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  1. #1
    Beginner Beginner Manvydas is on a distinguished road
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    TC27x VADC event / interrupt on end of conversion

    Maybe someone has any example of how to setup VADC to raise interrupt after every end of conversation? Or there should I start? From documentation I have read 28.11 Service Request Generation, but still can't find any iLLD library function to implement that. As I understand none of examples
    from AURIX customer documentation uses any interrupts. Thank you for your answers.

  2. #2
    New Member New Member
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    MMarquardt is on a distinguished road
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    Hi, I hope the following code snippet does help. It is for TC2xx devices and not necessarily tested on TC27x. so maybe you need to adapt some multiplexer settings:

    //Here do not forget to enable GTM clock in GTM_CLC register.
    GTM_TOM0_CH6_CN0.U = 0x0; //reset counter register
    GTM_TOM0_CH6_SR0.U = 0x0200; //set period
    GTM_TOM0_CH6_SR1.U = 0x0100; //set duty cycle

    GTM_TOM0_CH6_CM0.U = GTM_TOM1_CH1_SR0.U;
    GTM_TOM0_CH6_CM1.U = GTM_TOM1_CH1_SR1.U;
    GTM_TOM0_CH6_CTRL.U = 0; //reset channel control register

    GTM_TOM0_CH6_CTRL.B.CLK_SRC_SR = 0x3; //select clock source for channel
    GTM_TOM0_CH6_CTRL.B.SL = 1; //signal level for duty cycle
    GTM_TOM0_CH6_CTRL.B.OSM = 0; //disable one shot mode

    GTM_TOM0_TGC0_GLB_CTRL.B.UPEN_CTRL6 = 0x2; //Enable CMx update
    GTM_TOM0_TGC0_OUTEN_CTRL.B.OUTEN_CTRL6 = 0x2; //enable outputs on trigger
    GTM_TOM0_TGC0_ENDIS_CTRL.B.ENDIS_CTRL6 = 0x2; //enable channel on trigger
    GTM_TOM0_TGC0_FUPD_CTRL.B.FUPD_CTRL6 = 0x2; //enable Force Update on trigger

    GTM_TOM0_TGC0_GLB_CTRL.U |= 0x1; //Host _Trig
    GTM_ADCTRIG0OUT0.B.SEL0 = 0x1; //Select TOM0 Channel 6 as ADC Trigger 0
    }

    VADC_G0QMR0.B.ENTR = 1; //Enable External Trigger for this source
    VADC_G0QCTRL0.U = (0xF << 8) | (0x1 << 13) | (0x1 << 15) | (0x1 << 16) | (0x1 << 23);
    //External Trigger Input Selection
    //Trigger event upon a falling edge
    //Bitfields XTMODE and XTSEL can be written
    //Gate Input Selection
    //GTWC, Bitfield GTSEL can be written

    VADC_G0QINR0.U = (0x1 << 5) /*Refill*/ | (1 << 7) | 0x1 /*External Trigger*/;
    The views expressed here are my personal opinions, have not been reviewed or authorized by Infineon and do not necessarily represent the views of Infineon.

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