Gate source voltage

[Fränce]

What is the recommendation for alternative Vgs at the gate?

Any help is very much appreciated.

[User17674]

Fränce wrote:
What is the recommendation for alternative Vgs at the gate?

Any help is very much appreciated.

Do you mean in particular for SiC ? Any specific application in mind ?

[Fränce]

Thanks for the quick reply!
I mean in general.

[Harmon]

Hello Fränce,

For SiC MOSFET, ideally a regulated Vgs voltage of 15 V is recommended to maintain a low on-state losses.

[User17674 · Accepted solution]

Infineon recommends a VGSon of 15 V (20 V max.) and -5 V for off (-10 V max.) What happens if these values are exceeded?
The max values in the data sheet (+20 V/-10 V) take into account transient spikes at the gate signal of 5 V max (exceeding the designed gate drive output), which appear no longer than 1% of the total lifetime
Theoretically, the VGSon could also select to a be higher value, e.g. 18 V, however this will reduce the margin for gate voltage overshoot, which could be challenging for gate drive design and layout.
Since negative VGSoff for turn-off can have additional impact in the case of CoolSiC™ MOSFETs, Infineon recommends in general to keep the turn-off bias as high as possible, ideally VGSoff = 0 V
(see also AN-2018-09) https://www.infineon.com/dgdl/Infineon-AN2018-09_Guidelines_for_CoolSiC_MOSFET_gate_drive_voltage_wi...