Aug 08, 2019
04:00 AM
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Aug 08, 2019
04:00 AM
What is the recommendation for alternative Vgs at the gate?
Any help is very much appreciated.
Any help is very much appreciated.
Solved! Go to Solution.
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Aug 12, 2019
06:47 AM
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Aug 12, 2019
06:47 AM
Infineon recommends a VGSon of 15 V (20 V max.) and -5 V for off (-10 V max.) What happens if these values are exceeded?
The max values in the data sheet (+20 V/-10 V) take into account transient spikes at the gate signal of 5 V max (exceeding the designed gate drive output), which appear no longer than 1% of the total lifetime
Theoretically, the VGSon could also select to a be higher value, e.g. 18 V, however this will reduce the margin for gate voltage overshoot, which could be challenging for gate drive design and layout.
Since negative VGSoff for turn-off can have additional impact in the case of CoolSiC™ MOSFETs, Infineon recommends in general to keep the turn-off bias as high as possible, ideally VGSoff = 0 V
(see also AN-2018-09) https://www.infineon.com/dgdl/Infineon-AN2018-09_Guidelines_for_CoolSiC_MOSFET_gate_drive_voltage_wi...
The max values in the data sheet (+20 V/-10 V) take into account transient spikes at the gate signal of 5 V max (exceeding the designed gate drive output), which appear no longer than 1% of the total lifetime
Theoretically, the VGSon could also select to a be higher value, e.g. 18 V, however this will reduce the margin for gate voltage overshoot, which could be challenging for gate drive design and layout.
Since negative VGSoff for turn-off can have additional impact in the case of CoolSiC™ MOSFETs, Infineon recommends in general to keep the turn-off bias as high as possible, ideally VGSoff = 0 V
(see also AN-2018-09) https://www.infineon.com/dgdl/Infineon-AN2018-09_Guidelines_for_CoolSiC_MOSFET_gate_drive_voltage_wi...
4 Replies
Aug 09, 2019
12:42 AM
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Aug 09, 2019
12:42 AM
Fränce wrote:
What is the recommendation for alternative Vgs at the gate?
Any help is very much appreciated.
Do you mean in particular for SiC ? Any specific application in mind ?
Aug 09, 2019
05:23 AM
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Aug 09, 2019
05:23 AM
Thanks for the quick reply!
I mean in general.
I mean in general.
Aug 12, 2019
12:32 AM
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Aug 12, 2019
12:32 AM
Hello Fränce,
For SiC MOSFET, ideally a regulated Vgs voltage of 15 V is recommended to maintain a low on-state losses.
For SiC MOSFET, ideally a regulated Vgs voltage of 15 V is recommended to maintain a low on-state losses.
Aug 12, 2019
06:47 AM
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Aug 12, 2019
06:47 AM
Infineon recommends a VGSon of 15 V (20 V max.) and -5 V for off (-10 V max.) What happens if these values are exceeded?
The max values in the data sheet (+20 V/-10 V) take into account transient spikes at the gate signal of 5 V max (exceeding the designed gate drive output), which appear no longer than 1% of the total lifetime
Theoretically, the VGSon could also select to a be higher value, e.g. 18 V, however this will reduce the margin for gate voltage overshoot, which could be challenging for gate drive design and layout.
Since negative VGSoff for turn-off can have additional impact in the case of CoolSiC™ MOSFETs, Infineon recommends in general to keep the turn-off bias as high as possible, ideally VGSoff = 0 V
(see also AN-2018-09) https://www.infineon.com/dgdl/Infineon-AN2018-09_Guidelines_for_CoolSiC_MOSFET_gate_drive_voltage_wi...
The max values in the data sheet (+20 V/-10 V) take into account transient spikes at the gate signal of 5 V max (exceeding the designed gate drive output), which appear no longer than 1% of the total lifetime
Theoretically, the VGSon could also select to a be higher value, e.g. 18 V, however this will reduce the margin for gate voltage overshoot, which could be challenging for gate drive design and layout.
Since negative VGSoff for turn-off can have additional impact in the case of CoolSiC™ MOSFETs, Infineon recommends in general to keep the turn-off bias as high as possible, ideally VGSoff = 0 V
(see also AN-2018-09) https://www.infineon.com/dgdl/Infineon-AN2018-09_Guidelines_for_CoolSiC_MOSFET_gate_drive_voltage_wi...