I am using TLE9879QXA40 for development .

I configured ccu6 for three phase pwm generation and bridge driver in pwm mode .

I am able to see PWM signals in GH1 , GH2 , GH3 and compliment part respectively in GL1, GL2 , GL3 .
Just for testing i am giving 50 % duty cycle to each with dead band of 50 .

When i cutoff GH1 ,GL1 by disabling CC60 and COUT60 in MODCTR and MCMOUTS resgister
The pwm signals are not delivered in GH1 and GL1 , but GH1 get high by default , turning on
high side driver 1 .

I want to run bldc motor , for that at a time one pair GHx,GLx should be off that is 0 , but when i am disabling pwm
using MODCTR and MCMOUTS resgister pwm signals get cut off but high side becomes high by default .

Below is the code (All enabled GHx/GLx)

CCU6->TCTR0.reg = 0x80U;
CCU6->T12PR.reg = 1000U;
CCU6->T12DTC.bit.DTE0 = 1U;
CCU6->T12DTC.bit.DTE1 = 1U;
CCU6->T12DTC.bit.DTE2 = 1U;
CCU6->T12DTC.bit.DTM = 50;
CCU6->TCTR4.bit.T12STR = 1U;
CCU6->CC60SR.reg = 500U;
CCU6->CC61SR.reg = 500U;
CCU6->CC62SR.reg = 500U;
CCU6->TCTR4.bit.T12STR = 1U;
CCU6->CC63SR.reg = 0x0U;
CCU6->TCTR2.reg = 0x0U;
CCU6->TRPCTR.reg = 0x0U;
CCU6->MODCTR.reg = 0xFFU;
CCU6->MCMOUTS.reg = 0xFFU;
CCU6->MCMCTR.reg = 0x0U;
CCU6->T12MSEL.reg = 0x333U;
CCU6->INP.reg = 0x0U;
CCU6->IEN.reg = 0x0U;
CCU6->PSLR.bit.PSL = 0U;
CCU6->CMPSTAT.reg = 0x1500U;
CCU6->TCTR4.bit.T12STR = 1U;
CCU6->TCTR4.bit.T12RS = 1U;

In above code when i change MODCTR and MCMOUTS to disable CC60 and COUT60

CCU6->MODCTR.reg = (uint16_t) 0xFCU;
CCU6->MCMOUTS.reg = (uint16_t) 0xFCU;

PWM get cuttoff in GH1 and GL1 but GH1 becomes high by default .

Is there any way to cuttoff completely i.e when pwm not provided both GH1,GL1 get off .