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Thread: XMC4800 Automation Board V2 network connection not working

  1. #1
    Beginner Beginner GraemeF is on a distinguished road
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    XMC4800 Automation Board V2 network connection not working

    Hi,

    I have the XMC4800 Automation Board V2. My project is using both the EtherCAT and Ethernet components of the board. The Ethernet side is being connected to a thirdparty marking head controller.

    I have found that the only way I can get the XMC4800 board to successfully communicate with the marking head is to set up a tap on the XMC4800 transmit wires (Orange, White/Orange) of the ethernet cable and plug the tap cable into a computer or switch. The switch doesn't even need to powered on (but the computer does). I found this out by getting my system working while monitoring the transmit wires via wireshark, but when monitoring the receive wires or not having the tap plugged in it did not work.

    The marking head controller has its network socket connected to a Wurth Elektronik WE 749010012A Lan transformer and a Texas Instruments DP83849C Ethernet Phy (dual phy chip) and then an FPGA.


    I am configuring the XMC_ETH settings to disable auto negotiation as the marking head also does not communicate if auto negotiation is enabled, even though XMC_ETH_PHY_IsAutonegotiationCompleted() returns and XMC_ETH_PHY_GetLinkSpeed() and XMC_ETH_PHY_GetLinkDuplex() reports the correct values (XMC_ETH_LINK_SPEED_100M and XMC_ETH_LINK_DUPLEX_FULL).


    I was wondering if I need to bridge the transmit wires (Orange, White/Orange) with a capacitor, or something?


    This is my configuration:

    Code:
    #define ETH_PHY_ADDR 0
    
    #define ETH_RXD1     P14_9
    #define ETH_RXD0     P14_8
    #define ETH_RXER     P0_11
    #define ETH_CLK_RMII P15_8
    #define ETH_TX_EN    P5_9
    #define ETH_TXD1     P2_13
    #define ETH_TXD0     P2_12
    #define ETH_CRS_DV   P15_9
    #define ETH_MDIO     P1_11
    #define ETH_MDC      P1_10
    
    /* MAC ADDRESS:
     * Note: REAJet Controller seems to have a fixed MAC address of: 00:0e:f9:00:5c:fd
     *   (the slave seems to have a fixed MAC address of: 00:0e:f9:00:5c:fe) */
    #define MAC_ADDR0   0x00
    #define MAC_ADDR1   0x0e
    #define MAC_ADDR2   0xf9
    #define MAC_ADDR3   0x00
    #define MAC_ADDR4   0x5c
    #define MAC_ADDR5   0xfd
    #define MAC_ADDR    ((uint64_t)MAC_ADDR0 | \
                         ((uint64_t)MAC_ADDR1 << 8) | \
                         ((uint64_t)MAC_ADDR2 << 16) | \
                         ((uint64_t)MAC_ADDR3 << 24) | \
                         ((uint64_t)MAC_ADDR4 << 32) | \
                         ((uint64_t)MAC_ADDR5 << 40))
    
    static XMC_ETH_PHY_CONFIG_t eth_phy_config =
    {
      .interface = XMC_ETH_LINK_INTERFACE_RMII,
      .speed = XMC_ETH_LINK_SPEED_100M,
      .duplex = XMC_ETH_LINK_DUPLEX_FULL,
      .enable_auto_negotiate = false,
      .enable_loop_back = false
    };
    
    static XMC_ETH_MAC_t eth_mac =
    {
      .regs = ETH0,
      .address = MAC_ADDR,
      .rx_desc = rx_desc,
      .tx_desc = tx_desc,
      .rx_buf = &rx_buf[0][0],
      .tx_buf = &tx_buf[0][0],
      .num_rx_buf = XMC_ETH_MAC_NUM_RX_BUF,
      .num_tx_buf = XMC_ETH_MAC_NUM_TX_BUF
    };
    
    
      // init the eth MAC and PHY
      XMC_ETH_MAC_PORT_CTRL_t port_control;
      XMC_GPIO_CONFIG_t gpio_config;
    
      gpio_config.mode = XMC_GPIO_MODE_INPUT_TRISTATE;
      XMC_GPIO_Init(ETH_RXD0, &gpio_config);
      XMC_GPIO_Init(ETH_RXD1, &gpio_config);
      XMC_GPIO_Init(ETH_CLK_RMII, &gpio_config);
      XMC_GPIO_Init(ETH_CRS_DV, &gpio_config);
      XMC_GPIO_Init(ETH_RXER, &gpio_config);
      XMC_GPIO_Init(ETH_MDIO, &gpio_config);
    
      port_control.mode = XMC_ETH_MAC_PORT_CTRL_MODE_RMII;
      port_control.rxd0 = XMC_ETH_MAC_PORT_CTRL_RXD0_P14_8;
      port_control.rxd1 = XMC_ETH_MAC_PORT_CTRL_RXD1_P14_9;
      port_control.clk_rmii = XMC_ETH_MAC_PORT_CTRL_CLK_RMII_P15_8;
      port_control.crs_dv = XMC_ETH_MAC_PORT_CTRL_CRS_DV_P15_9;
      port_control.rxer = XMC_ETH_MAC_PORT_CTRL_RXER_P0_11;
      port_control.mdio = XMC_ETH_MAC_PORT_CTRL_MDIO_P1_11;
      XMC_ETH_MAC_SetPortControl(&eth_mac, port_control);
    
      XMC_ETH_MAC_Init(&eth_mac);
    
      XMC_ETH_MAC_DisableJumboFrame(&eth_mac);
    
      gpio_config.output_level = XMC_GPIO_OUTPUT_LEVEL_LOW;
      gpio_config.output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SHARP_EDGE;
      gpio_config.mode = (XMC_GPIO_MODE_t)((uint32_t)XMC_GPIO_MODE_OUTPUT_PUSH_PULL | P2_12_AF_ETH0_TXD0);
      XMC_GPIO_Init(ETH_TXD0, &gpio_config);
    
      gpio_config.mode = (XMC_GPIO_MODE_t)((uint32_t)XMC_GPIO_MODE_OUTPUT_PUSH_PULL | P2_13_AF_ETH0_TXD1);
      XMC_GPIO_Init(ETH_TXD1, &gpio_config);
    
      gpio_config.mode = (XMC_GPIO_MODE_t)((uint32_t)XMC_GPIO_MODE_OUTPUT_PUSH_PULL | P5_9_AF_ETH0_TX_EN);
      XMC_GPIO_Init(ETH_TX_EN, &gpio_config);
    
      gpio_config.mode = (XMC_GPIO_MODE_t)((uint32_t)XMC_GPIO_MODE_OUTPUT_PUSH_PULL | P1_10_AF_ETH0_MDC);
      XMC_GPIO_Init(ETH_MDC, &gpio_config);
    
      XMC_GPIO_SetHardwareControl(ETH_MDIO, P1_11_HWCTRL_ETH0_MDO);
    
      while (XMC_ETH_PHY_GetLinkStatus(&eth_mac, ETH_PHY_ADDR) != XMC_ETH_LINK_STATUS_UP)
      {
        // wait
      }
    
      // Note: Auto negotiation is off, we have a fixed speed of 100BaseT and Full duplex
      XMC_ETH_LINK_SPEED_t  speed = XMC_ETH_LINK_SPEED_100M;
      XMC_ETH_LINK_DUPLEX_t duplex = XMC_ETH_LINK_DUPLEX_FULL;
      XMC_ETH_MAC_SetLink(&eth_mac, speed, duplex);
    
      // Enable ethernet interrupts
      XMC_ETH_MAC_EnableEvent(&eth_mac, XMC_ETH_MAC_EVENT_RECEIVE);
    
      NVIC_SetPriority(ETH0_0_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 63, 0));
      NVIC_ClearPendingIRQ(ETH0_0_IRQn);
      NVIC_EnableIRQ(ETH0_0_IRQn);
    
      XMC_ETH_MAC_EnableTx(&eth_mac);
      XMC_ETH_MAC_EnableRx(&eth_mac);

    Regards,
    Graeme

  2. #2

    Infineon Employee
    Infineon Employee
    jferreira will become famous soon enough
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    Hi,

    We never came across such observation before.
    Maybe you can try to reduce the driver strength of the transmit signals.
    Code:
      gpio_config.output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_MEDIUM_EDGE;

    Regards,
    Jesus
    The views expressed here are my personal opinions, have not been reviewed or authorized by Infineon and do not necessarily represent the views of Infineon.

  3. #3
    Beginner Beginner GraemeF is on a distinguished road
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    Hi Jesus,

    I have now tried all of the enum values, without the tap plugged in, none of which get the Ethernet comms working. When I have my tap plugged in to the TX+ / TX- wires any of the “strong” enum values work. (It looks like the odd frame gets through every 5-10 seconds or so from monitoring the RX channel. I’m sending a frame once every 20us.)

    I was playing around with my voltmeter and comms started working when measuring volts across the TX+ / TX- wires so I tried bridging the wires with various resistors. Bridging with a 120 ohm resistor allows the comms to work.

    Looking at the tech sheet for the marking head magnetics component it doesn’t have any built in termination resistors. Looking at the circuit board there are termination resistors between the magnetics and phy but I can’t see any between the magnetics and socket. If I’m correct and there aren’t any how would that affect things?

    Regards,
    Graeme.

  4. #4

    Infineon Employee
    Infineon Employee
    jferreira will become famous soon enough
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    Hi,

    I have been looking to the schematics and datasheets of PHY and magnetics of the automation board.
    Everything looks fine to me according to the hardware design checklist, http://ww1.microchip.com/downloads/e.../00002778A.pdf


    What about the other side? http://www.ti.com/lit/ds/symlink/dp83849c.pdf page 35.


    Regards,
    Jesus
    The views expressed here are my personal opinions, have not been reviewed or authorized by Infineon and do not necessarily represent the views of Infineon.

  5. #5
    Beginner Beginner GraemeF is on a distinguished road
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    Hi Jesus,

    As far as I can tell the marking head conforms to the document you linked. From the tech sheet it looks like is doesn't required termination resistors between the magnetics and the socket. It has 49.9ohm termination resistors between the magnetics and the phy, I can't tell what capacitors its using. It also has Semtech SRV05 surge protection chips on the TX/RX lines.

    I will contact the supplier to see if they have any thoughts.

    Regards,
    Graeme.

  6. #6
    Beginner Beginner GraemeF is on a distinguished road
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    Hi,

    Just an update to close off the thread.

    The connection to the marking head is via a Y-coded hybrid cable (Ethernet and power). I purchased a "Y-cod. / D-cod. Ethernet + A-cod." T coupler from Murr Elektronik to split the power from the Ethernet and it is now stable.

    I guess my cable splitting / splicing skills weren't up to the job.

    Regards,
    Graeme.

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