infineon4engi@twitter infineon@linkedin infineon4engineers infineon@youtube
twitter Facebook Linkedin Youtube

+ Reply to Thread
Results 1 to 1 of 1

Thread: XMC4200 VADC Background Source blocks - intended behavior ?

  1. #1
    New Member New Member funkyluke is on a distinguished road
    Join Date
    Jul 2018

    XMC4200 VADC Background Source blocks - intended behavior ?


    I'm currently experiencingbehavior of the VADC background source that does not fit with my expectation ;-)

    I have multiple channels of both VADC Groups added to the background source and I'm using FIFOs on most of them.
    During startup I have to check one of the channels multiple times before the RTOS starts up and I noticed that my code gets stuck there waiting for the VALID Flag after the first read.

    Further Investigation revealed that BRSPND has one pending bit left, which seems to prevent reloading of BRSSEL into BRSPND.
    The reason for this seems to be that the Result Register of this Channel has the Wait-For-Read Flag set as suggested when a FIFO is used (it is not set on the other channels). If I use the debugger to clear the Valid Flag, the BRSPND Register is reloaded and the application continues.
    That raises a couple of questions:
    • Why does a WFR flag block the complete queue/source and not just this channel?
    • Is this intentional?
    • How can this be avoided?
    • What exactly does WFR do with ADC FIFOs? Why does it need to be set on the Input Stage and not on the Output stage? What happens if this is reversed?
    • Is there a simple way to trigger a complete BRSPND reload - Writing to BRSMR/LDEV does not do it, although the RM says it does.

    Last edited by funkyluke; Jun 13th, 2019 at 10:32 AM.

+ Reply to Thread

Tags for this Thread


All content and materials on this site are provided “as is“. Infineon makes no warranties or representations with regard to this content and these materials of any kind, whether express or implied, including without limitation, warranties or representations of merchantability, fitness for a particular purpose, title and non-infringement of any third party intellectual property right. No license, whether express or implied, is granted by Infineon. Use of the information on this site may require a license from a third party, or a license from Infineon.

Infineon accepts no liability for the content and materials on this site being accurate, complete or up- to-date or for the contents of external links. Infineon distances itself expressly from the contents of the linked pages, over the structure of which Infineon has no control.

Content on this site may contain or be subject to specific guidelines or limitations on use. All postings and use of the content on this site are subject to the Usage Terms of the site; third parties using this content agree to abide by any limitations or guidelines and to comply with the Usage Terms of this site. Infineon reserves the right to make corrections, deletions, modifications, enhancements, improvements and other changes to the content and materials, its products, programs and services at any time or to move or discontinue any content, products, programs, or services without notice.