Jun 02, 2019
11:52 PM
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Jun 02, 2019
11:52 PM
I would have some clarifications about the memory flash usage for eeprom emulation working with an XMC4200 having 256Kb of program flash:
Is the following memory configuration allowed ? I have tried it but without success 😞
64kB for bootloader starting at address C000000
32kB for EEPROM emulation starting at address C010000 (sector S4 and S5)
160 kB for the application firmware starting at address C018000
At the contrary the following configuration works :
64kB for bootloader starting at address C000000
64kB for EEPROM emulation starting at address C010000 (sector S4 ,S5, S6 and S7)
128 kB for the application firmware starting at address C020000
I would prefer the first configuration to have more memory for the application
Thank you for the help
Is the following memory configuration allowed ? I have tried it but without success 😞
64kB for bootloader starting at address C000000
32kB for EEPROM emulation starting at address C010000 (sector S4 and S5)
160 kB for the application firmware starting at address C018000
At the contrary the following configuration works :
64kB for bootloader starting at address C000000
64kB for EEPROM emulation starting at address C010000 (sector S4 ,S5, S6 and S7)
128 kB for the application firmware starting at address C020000
I would prefer the first configuration to have more memory for the application
Thank you for the help
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3 Replies
Jun 03, 2019
03:05 PM
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Jun 03, 2019
03:05 PM
Hi,
What do you mean by "without success"? Anyway it is recommend the second option because a logical sector erase operation disturbs flash cells in adjacent logical sectors.
Regards,
Jesus.
What do you mean by "without success"? Anyway it is recommend the second option because a logical sector erase operation disturbs flash cells in adjacent logical sectors.
Regards,
Jesus.
Jun 04, 2019
12:03 AM
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Jun 04, 2019
12:03 AM
I will check again in detail what was the problem with first option.
When you say "because a logical sector erase operation disturbs flash cells in adjacent logical sectors" ; could you confirm that it is true only for cells in the same physical sector ?
In other words : if sector S7 is erased, some cells in sector S6 could be disturbed but not in sector S8 because it is in a different physical sector. Isn't it?
Thank you
Enzo
When you say "because a logical sector erase operation disturbs flash cells in adjacent logical sectors" ; could you confirm that it is true only for cells in the same physical sector ?
In other words : if sector S7 is erased, some cells in sector S6 could be disturbed but not in sector S8 because it is in a different physical sector. Isn't it?
Thank you
Enzo
Jun 04, 2019
05:58 AM
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Jun 04, 2019
05:58 AM
Hi Enzo,
The disturb occurs only among the adjacent logical sectors in the same physical sector.
Regards,
Jesus
The disturb occurs only among the adjacent logical sectors in the same physical sector.
Regards,
Jesus