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Thread: hardware nested interrupts handling

  1. #1
    Intermediate Intermediate Lukas_G is on a distinguished road
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    hardware nested interrupts handling

    hi,
    I have a hardware interruption in which another hardware interruption is nested. Actually only the first interruption works properly nested one is not handled.

    TriCore™ V1.6 Core Architecture user manual says that,
    there are interruptions groups, in the interrupt vector table,
    that set the maximum available (in scope of the group) priority to the first interruption occurrence
    so no other interrupt will occur before current one is finished.
    By default there is one group in whole PiPN range (0-255), so first interrupt is set with priority 255 and block all others.

    User manual says it's possible
    to create custom groups of interruptions but i couldn't find any reference to it.

    how can I create such groups ?

    tricore user manual(chapter 5.6.2, page 71) :
    https://www.infineon.com/dgdl/tc1_6_...373b0f374d5d67

  2. #2
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    MoD is on a distinguished road
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    The nested one is not handled because the interrupts are disabled when the device jumps in the interrupt vector table. If you will allow nested Interrupts then your interrupt service routine must be enable the interrupts via intrinsic function __enable(). Please note that in this case only interrupts with higher priority than the actual interrupt can nested the actual interrupt.
    The views expressed here are my personal opinions, have not been reviewed or authorized by Infineon and do not necessarily represent the views of Infineon.

  3. #3
    Intermediate Intermediate Lukas_G is on a distinguished road
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    that works thank you

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