ASCLIN interruption inside timer interruption problem

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cross mob
User16898
Level 4
Level 4
Hi,

I,m currently developing project on tc22x. I'm using following modules that uses interruptions :
- gtm_tom timer
- asclin1_spi
Only hardware interrupts are used.

spi has 3 interrupts: tx, rx, error, with priorities 1, 2, 3
timer has one interrupt with priority 10

Spi, placed in main() loop ,works good.
When i place it in the timmer interrupt it stop working,

the
transfer_in_progres
bit is constantly set to true
and spi do not send/receive anything

I'm enabling interrupts every time the timer interruption execute.

I also use multican module that does not use any interrupts and it works fine in timer interrupt, so I think it's the interruption configuration problem.


why such situation happens despite higher Spi interrupts priorities ?
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1 Reply
MoD
Employee
Employee
50 likes received 500 replies posted 100 solutions authored
As long as the timer interrupt has a higher priority than the spi interrupts are the spi interrupts ignored until the timer interrupt is exited. After enabling the interrupts in the timer interrupt only interrupts with higher priority than 10 can interrupt the timer interrupt.
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