Apr 25, 2019
05:12 AM
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Apr 25, 2019
05:12 AM
Hi,
I have following question:
what happens when the same interrupt occur twice ?
I use timer interruption that is handled once per 1ms ( timer interrupt). Interruption handler execute some code.
There is possibility, that some parts of code, inside interruption, could execute more than 1ms. What happens if code inside interruption will execute more than 1ms
and next timer interruption,with the same priority, occur ?
used timer module TOM,GTM
developing platform Aurix TC22L , (lockstep not used)
Using only hardware interrupts
I have following question:
what happens when the same interrupt occur twice ?
I use timer interruption that is handled once per 1ms ( timer interrupt). Interruption handler execute some code.
There is possibility, that some parts of code, inside interruption, could execute more than 1ms. What happens if code inside interruption will execute more than 1ms
and next timer interruption,with the same priority, occur ?
used timer module TOM,GTM
developing platform Aurix TC22L , (lockstep not used)
Using only hardware interrupts
3 Replies
Apr 25, 2019
03:17 PM
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Apr 25, 2019
03:17 PM
Each interrupt source is assigned a unique interrupt priority number known as the Service Request Priority Number (SRPN). On receipt of an interrupt request from an interrupt source the SRPN is used by the Interrupt Control Unit (ICU) to prioritize between multiple concurrent interrupt requests. The SRPN of the winning request is supplied to the CPU as a Pending Interrupt Priority Number (PIPN) along with an request trigger. The CPU decides whether to accept a requested interrupt by comparing the PIPN with its Current CPU Priority Number (CCPN). If the CPU decides to accept the requested interrupt it responds with an Interrupt Acknowledge and the returns the priority number of the taken interrupt.
When you enter the ISR interrupts are globally disabled and you need to re-enable interrupts if you want nested interrupts (you can use the BISR instruction). However the same interrupt cannot interrupt itself since it is at the same level. The interrupt could pend until you exit the ISR or will be lost and indicated in the respective IOV bit of the SRC register.
When you enter the ISR interrupts are globally disabled and you need to re-enable interrupts if you want nested interrupts (you can use the BISR instruction). However the same interrupt cannot interrupt itself since it is at the same level. The interrupt could pend until you exit the ISR or will be lost and indicated in the respective IOV bit of the SRC register.
Apr 25, 2019
11:04 PM
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Apr 25, 2019
11:04 PM
The interrupt could pend until you exit the ISR or will be lost and indicated in the respective IOV bit of the SRC register.
Thanks quick for response.
What decides, if next interrupt is pending or lost ?
May 08, 2019
07:33 AM
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May 08, 2019
07:33 AM
The IOV indicate that an Interrupt Overflow is detected. This means that you lost the previous interrupt. This can be happen if you have a timer and the interrupt of this timer happens second time without the first interrupt is serviced. In any case there will be pending an interrupt.