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Thread: QSPI code for TC399

  1. #1
    Intermediate Intermediate KDN is on a distinguished road
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    QSPI code for TC399

    Hi,

    I am new in infineon controller, can any one provide me QSPI code for TC399 from basic level.

    Calculation for time quantum to set SPI clock at 1Mhz(controller clock frequency is 20Mhz) and how to select ECON resistor using BACON resistor.

    I want to configure QSPI5
    Last edited by KDN; Apr 11th, 2019 at 11:08 AM.

  2. #2
    Advanced Advanced cwunder is on a distinguished road
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    Sorry but I have to comment that you are asking a question without really giving enough information.
    controller clock frequency is 20Mhz
    Is this the crystal frequency? As usually the peripheral PLL is used (fPLL2) and typically this is either 200MHz or 160MHz. For 200MHz, to get a 1MHz SPI Clock you could use the following settings where Q=24, A=3,B=1 and C=3.

    The ECON and BACON are configured to meet the device parameters required for communication.
    Last edited by cwunder; Apr 14th, 2019 at 12:02 PM.

  3. #3
    Intermediate Intermediate KDN is on a distinguished road
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    Hi,

    20Mhz is crystal frequency.

    Can you please write what calculation you have done for 200MHz to get Q=24, A=3,B=1 and C=3 or can you please share any doc.
    Last edited by KDN; Apr 16th, 2019 at 10:34 AM.

  4. #4
    Advanced Advanced cwunder is on a distinguished road
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    Enclosed is the formula from the user's manual (TQ=0, Q=24, A=3,B=1 and C=3, fPER=200MHz):
    Click image for larger version

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    Last edited by cwunder; Apr 16th, 2019 at 07:50 PM.

  5. #5
    Intermediate Intermediate KDN is on a distinguished road
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    Hi,

    How to select ISR for QSPI5.

  6. #6
    Advanced Advanced cwunder is on a distinguished road
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    The interrupts all basically work the same and follow the common definition of the Service Request Control Register (SRC). You need to choose the SRPN that matches the entry in the vector table. This varies depending on the toolchain you are using. Then you need to select the TOS you want to use and also enable the interrupt both locally via the SRCi.SRE and globally enable interrupts via the PSW.IE.

    As an example:
    Code:
        IFX_INTERRUPT(QSPI5_RxISR, 0, INTPRIO_CPU0_QSPI5_RX);
        SRC_QSPI5RX.U  =  (CPU0_SERVICE << TOS) | (true << SRE) | INTPRIO_CPU0_QSPI5_RX;
        IFX_INTERRUPT(QSPI5_TxISR, 0, INTPRIO_CPU0_QSPI5_TX);
        SRC_QSPI5TX.U  =  (CPU0_SERVICE << TOS) | (true << SRE) | INTPRIO_CPU0_QSPI5_TX;

  7. #7
    Intermediate Intermediate KDN is on a distinguished road
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    Hi,

    where will I find vector table?

    If I am not wrong TOS will decide which CPU or DMA will provide service.

  8. #8
    Advanced Advanced cwunder is on a distinguished road
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    The vector table is defined in the linker/locator file. You add the interrupt function in your source code such that the linker can add the location of your ISR in the table. The TOS indicates which CPU or the DMA should handle the interrupt.

  9. #9
    Intermediate Intermediate KDN is on a distinguished road
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    HI,

    sorry but I am not able to find out ISR table can you please elaborate little more

  10. #10
    Advanced Advanced cwunder is on a distinguished road
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    To create an interrupt entry it usually involves two parts. You have to have a table defined in your linker/locator file and then you need to create the entry with a keyword or macro in a source file that the linker/locater can use.

    What toolchain are you using?

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