U2C1 Not working for SPI ?

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User16410
Level 1
Level 1
The below code works as a charm for U1C1, but when rewritten for U2C1, as posted below, it stops working.

Slave Select and the CLK is still running and working fine, but there is no data coming out!

What am I doing wrong ? Is U2C1 not supposed to work for SPI ?

And also do I need to configure the mode of a data-pin like:
master_data_pin_config.mode = (XMC_GPIO_MODE_t)(XMC_GPIO_MODE_OUTPUT_PUSH_PULL | P4_7_HWCTRL_U2C1_DOUT0);

When XMC_GPIO_SetHardwareControl(master_data_pin, 7, XMC_GPIO_HWCTRL_PERIPHERAL1); is called later on ?

Thankful for any help!

Processor is XMC4500F144 and pinout is like:
P4.2 U2C1_SCLKOUT ALT4
P4.3 U2C1_SEL02 ALT1
P4.4 U2C1_DOUT3 / HWIN3 HWO0 / HWI0
P4.5 U2C1_DOUT2 / HWIN2 HWO0 / HWI0
P4.6 U2C1_DOUT1 / HWIN1 HWO0 / HWI0
P4.7 U2C1_DOUT0 / HWIN0 HWO0 / HWI0



XMC_USIC_CH_t *spi_master_ch = XMC_SPI2_CH1;

XMC_GPIO_CONFIG_t master_data_pin_config;
XMC_GPIO_CONFIG_t master_selo_pin_config;
XMC_GPIO_CONFIG_t master_clck_pin_config;

XMC_GPIO_PORT_t *master_data_pin = XMC_GPIO_PORT4;
XMC_GPIO_PORT_t *master_selo_pin = XMC_GPIO_PORT4;
XMC_GPIO_PORT_t *master_clck_pin = XMC_GPIO_PORT4;

XMC_SPI_CH_CONFIG_t spi_config_masterMode;

uint16_t transmit_data = 0xAA;

//Master Mode
/*SPI Configuration*/
spi_config_masterMode.baudrate = 100000;
spi_config_masterMode.bus_mode = XMC_SPI_CH_BUS_MODE_MASTER;
spi_config_masterMode.selo_inversion = XMC_SPI_CH_SLAVE_SEL_INV_TO_MSLS;
spi_config_masterMode.parity_mode = XMC_USIC_CH_PARITY_MODE_NONE;

/*Initialize SPI*/
XMC_SPI_CH_Init(spi_master_ch, &spi_config_masterMode);

XMC_SPI_CH_SetBitOrderMsbFirst(spi_master_ch);

XMC_SPI_CH_SetWordLength(spi_master_ch, 8);

XMC_SPI_CH_SetFrameLength(spi_master_ch, 64);

/* Configure the clock polarity and clock delay */
XMC_SPI_CH_ConfigureShiftClockOutput(spi_master_ch,
XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_1_DELAY_DISABLED,
XMC_SPI_CH_BRG_SHIFT_CLOCK_OUTPUT_SCLK);

/* Configure Leading/Trailing delay */
XMC_SPI_CH_SetSlaveSelectDelay(spi_master_ch, 2U);

/*Input source selected*/
XMC_SPI_CH_SetInputSource(spi_master_ch, XMC_SPI_CH_INPUT_DIN0 ,USIC2_C1_DX0_DOUT0);
XMC_SPI_CH_SetInputSource(spi_master_ch, XMC_SPI_CH_INPUT_DIN1 ,USIC2_C1_DX3_DOUT1);
XMC_SPI_CH_SetInputSource(spi_master_ch, XMC_SPI_CH_INPUT_DIN2 ,USIC2_C1_DX4_DOUT2);
XMC_SPI_CH_SetInputSource(spi_master_ch, XMC_SPI_CH_INPUT_DIN3 ,USIC2_C1_DX5_DOUT3);

/*Start SPI*/
XMC_SPI_CH_Start(spi_master_ch);

/*GPIO Input pin configuration*/
master_data_pin_config.output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_MEDIUM_EDGE;
master_data_pin_config.output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH;
master_data_pin_config.mode = (XMC_GPIO_MODE_t)(XMC_GPIO_MODE_OUTPUT_PUSH_PULL | P4_7_HWCTRL_U2C1_DOUT0);
XMC_GPIO_Init(master_data_pin, 7, &master_data_pin_config);
master_data_pin_config.mode = (XMC_GPIO_MODE_t)(XMC_GPIO_MODE_OUTPUT_PUSH_PULL | P4_6_HWCTRL_U2C1_DOUT1);
XMC_GPIO_Init(master_data_pin, 6, &master_data_pin_config);
master_data_pin_config.mode = (XMC_GPIO_MODE_t)(XMC_GPIO_MODE_OUTPUT_PUSH_PULL | P4_5_HWCTRL_U2C1_DOUT2);
XMC_GPIO_Init(master_data_pin, 5, &master_data_pin_config);
master_data_pin_config.mode = (XMC_GPIO_MODE_t)(XMC_GPIO_MODE_OUTPUT_PUSH_PULL | P4_4_HWCTRL_U2C1_DOUT3);
XMC_GPIO_Init(master_data_pin, 4, &master_data_pin_config);

XMC_GPIO_SetHardwareControl(master_data_pin, 7, XMC_GPIO_HWCTRL_PERIPHERAL1);
XMC_GPIO_SetHardwareControl(master_data_pin, 6, XMC_GPIO_HWCTRL_PERIPHERAL1);
XMC_GPIO_SetHardwareControl(master_data_pin, 5, XMC_GPIO_HWCTRL_PERIPHERAL1);
XMC_GPIO_SetHardwareControl(master_data_pin, 4, XMC_GPIO_HWCTRL_PERIPHERAL1);

/*GPIO Slave Select line pin configuration*/
master_selo_pin_config.output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_MEDIUM_EDGE;
master_selo_pin_config.output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH;
master_selo_pin_config.mode = XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT1;
XMC_GPIO_Init(master_selo_pin, 3, &master_selo_pin_config);
XMC_SPI_CH_EnableSlaveSelect(spi_master_ch, XMC_SPI_CH_SLAVE_SELECT_2);

/*GPIO Clock pin configuration*/
master_clck_pin_config.output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_MEDIUM_EDGE;
master_clck_pin_config.output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH;
master_clck_pin_config.mode = XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT4;
XMC_GPIO_Init(master_clck_pin, 2, &master_clck_pin_config);

/* Clear the flags */
XMC_SPI_CH_ClearStatusFlag(spi_master_ch, XMC_SPI_CH_STATUS_FLAG_ALTERNATIVE_RECEIVE_INDICATION);
XMC_SPI_CH_ClearStatusFlag(spi_master_ch, XMC_SPI_CH_STATUS_FLAG_RECEIVE_INDICATION);

XMC_SPI_CH_Transmit(spi_master_ch, transmit_data, XMC_SPI_CH_MODE_STANDARD);
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1 Reply
jferreira
Employee
Employee
10 sign-ins 5 sign-ins First like received
Hi,

The pins you are using can only be used by U2C1 if the HWCTRL is enabled for the IOs and in the peripheral.
You will need instead of
XMC_SPI_CH_Transmit(spi_master_ch, transmit_data, XMC_SPI_CH_MODE_STANDARD); 

call like this
XMC_SPI_CH_Transmit(spi_master_ch, transmit_data, XMC_SPI_CH_MODE_STANDARD_HALFDUPLEX | 1); // XMC_SPI_CH_MODE_STANDARD_HALFDUPLEX  should be 5 instead of 4



In addition the configuration of the IOs mode should be as below, i.e. the hardware control configuration is done with the later XMC_GPIO_SetHardwareControl()
	/*GPIO Input pin configuration*/
master_data_pin_config.output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_MEDIUM_EDGE;
master_data_pin_config.output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH;
master_data_pin_config.mode = (XMC_GPIO_MODE_t)(XMC_GPIO_MODE_OUTPUT_PUSH_PULL);
XMC_GPIO_Init(P4_7, &master_data_pin_config);
master_data_pin_config.mode = (XMC_GPIO_MODE_t)(XMC_GPIO_MODE_OUTPUT_PUSH_PULL);
XMC_GPIO_Init(P4_6, &master_data_pin_config);
master_data_pin_config.mode = (XMC_GPIO_MODE_t)(XMC_GPIO_MODE_OUTPUT_PUSH_PULL);
XMC_GPIO_Init(P4_5, &master_data_pin_config);
master_data_pin_config.mode = (XMC_GPIO_MODE_t)(XMC_GPIO_MODE_OUTPUT_PUSH_PULL);
XMC_GPIO_Init(P4_4, &master_data_pin_config);


3408.attach
Regards,
Jesus
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