infineon4engi@twitter infineon@linkedin infineon4engineers infineon@youtube
twitter Facebook Linkedin Youtube

+ Reply to Thread
Results 1 to 2 of 2

Thread: U2C1 Not working for SPI ?

  1. #1
    New Member New Member RebelRob is on a distinguished road
    Join Date
    Jan 2019

    U2C1 Not working for SPI ?

    The below code works as a charm for U1C1, but when rewritten for U2C1, as posted below, it stops working.

    Slave Select and the CLK is still running and working fine, but there is no data coming out!

    What am I doing wrong ? Is U2C1 not supposed to work for SPI ?

    And also do I need to configure the mode of a data-pin like:
    master_data_pin_config.mode = (XMC_GPIO_MODE_t)(XMC_GPIO_MODE_OUTPUT_PUSH_PULL | P4_7_HWCTRL_U2C1_DOUT0);

    When XMC_GPIO_SetHardwareControl(master_data_pin, 7, XMC_GPIO_HWCTRL_PERIPHERAL1); is called later on ?

    Thankful for any help!

    Processor is XMC4500F144 and pinout is like:
    P4.2 U2C1_SCLKOUT ALT4
    P4.3 U2C1_SEL02 ALT1
    P4.4 U2C1_DOUT3 / HWIN3 HWO0 / HWI0
    P4.5 U2C1_DOUT2 / HWIN2 HWO0 / HWI0
    P4.6 U2C1_DOUT1 / HWIN1 HWO0 / HWI0
    P4.7 U2C1_DOUT0 / HWIN0 HWO0 / HWI0

    XMC_USIC_CH_t *spi_master_ch = XMC_SPI2_CH1;

    XMC_GPIO_CONFIG_t master_data_pin_config;
    XMC_GPIO_CONFIG_t master_selo_pin_config;
    XMC_GPIO_CONFIG_t master_clck_pin_config;

    XMC_GPIO_PORT_t *master_data_pin = XMC_GPIO_PORT4;
    XMC_GPIO_PORT_t *master_selo_pin = XMC_GPIO_PORT4;
    XMC_GPIO_PORT_t *master_clck_pin = XMC_GPIO_PORT4;

    XMC_SPI_CH_CONFIG_t spi_config_masterMode;

    uint16_t transmit_data = 0xAA;

    //Master Mode
    /*SPI Configuration*/
    spi_config_masterMode.baudrate = 100000;
    spi_config_masterMode.bus_mode = XMC_SPI_CH_BUS_MODE_MASTER;
    spi_config_masterMode.selo_inversion = XMC_SPI_CH_SLAVE_SEL_INV_TO_MSLS;
    spi_config_masterMode.parity_mode = XMC_USIC_CH_PARITY_MODE_NONE;

    /*Initialize SPI*/
    XMC_SPI_CH_Init(spi_master_ch, &spi_config_masterMode);


    XMC_SPI_CH_SetWordLength(spi_master_ch, 8);

    XMC_SPI_CH_SetFrameLength(spi_master_ch, 64);

    /* Configure the clock polarity and clock delay */
    XMC_SPI_CH_ConfigureShiftClockOutput(spi_master_ch ,

    /* Configure Leading/Trailing delay */
    XMC_SPI_CH_SetSlaveSelectDelay(spi_master_ch, 2U);

    /*Input source selected*/
    XMC_SPI_CH_SetInputSource(spi_master_ch, XMC_SPI_CH_INPUT_DIN0 ,USIC2_C1_DX0_DOUT0);
    XMC_SPI_CH_SetInputSource(spi_master_ch, XMC_SPI_CH_INPUT_DIN1 ,USIC2_C1_DX3_DOUT1);
    XMC_SPI_CH_SetInputSource(spi_master_ch, XMC_SPI_CH_INPUT_DIN2 ,USIC2_C1_DX4_DOUT2);
    XMC_SPI_CH_SetInputSource(spi_master_ch, XMC_SPI_CH_INPUT_DIN3 ,USIC2_C1_DX5_DOUT3);

    /*Start SPI*/

    /*GPIO Input pin configuration*/
    master_data_pin_config.output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_MEDIUM_EDGE;
    master_data_pin_config.output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH;
    master_data_pin_config.mode = (XMC_GPIO_MODE_t)(XMC_GPIO_MODE_OUTPUT_PUSH_PULL | P4_7_HWCTRL_U2C1_DOUT0);
    XMC_GPIO_Init(master_data_pin, 7, &master_data_pin_config);
    master_data_pin_config.mode = (XMC_GPIO_MODE_t)(XMC_GPIO_MODE_OUTPUT_PUSH_PULL | P4_6_HWCTRL_U2C1_DOUT1);
    XMC_GPIO_Init(master_data_pin, 6, &master_data_pin_config);
    master_data_pin_config.mode = (XMC_GPIO_MODE_t)(XMC_GPIO_MODE_OUTPUT_PUSH_PULL | P4_5_HWCTRL_U2C1_DOUT2);
    XMC_GPIO_Init(master_data_pin, 5, &master_data_pin_config);
    master_data_pin_config.mode = (XMC_GPIO_MODE_t)(XMC_GPIO_MODE_OUTPUT_PUSH_PULL | P4_4_HWCTRL_U2C1_DOUT3);
    XMC_GPIO_Init(master_data_pin, 4, &master_data_pin_config);

    XMC_GPIO_SetHardwareControl(master_data_pin, 7, XMC_GPIO_HWCTRL_PERIPHERAL1);
    XMC_GPIO_SetHardwareControl(master_data_pin, 6, XMC_GPIO_HWCTRL_PERIPHERAL1);
    XMC_GPIO_SetHardwareControl(master_data_pin, 5, XMC_GPIO_HWCTRL_PERIPHERAL1);
    XMC_GPIO_SetHardwareControl(master_data_pin, 4, XMC_GPIO_HWCTRL_PERIPHERAL1);

    /*GPIO Slave Select line pin configuration*/
    master_selo_pin_config.output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_MEDIUM_EDGE;
    master_selo_pin_config.output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH;
    master_selo_pin_config.mode = XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT1;
    XMC_GPIO_Init(master_selo_pin, 3, &master_selo_pin_config);
    XMC_SPI_CH_EnableSlaveSelect(spi_master_ch, XMC_SPI_CH_SLAVE_SELECT_2);

    /*GPIO Clock pin configuration*/
    master_clck_pin_config.output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_MEDIUM_EDGE;
    master_clck_pin_config.output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH;
    master_clck_pin_config.mode = XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT4;
    XMC_GPIO_Init(master_clck_pin, 2, &master_clck_pin_config);

    /* Clear the flags */

    XMC_SPI_CH_Transmit(spi_master_ch, transmit_data, XMC_SPI_CH_MODE_STANDARD);

  2. #2

    Infineon Employee
    Infineon Employee
    jferreira will become famous soon enough
    Join Date
    Oct 2012

    The pins you are using can only be used by U2C1 if the HWCTRL is enabled for the IOs and in the peripheral.
    You will need instead of
    XMC_SPI_CH_Transmit(spi_master_ch, transmit_data, XMC_SPI_CH_MODE_STANDARD);
    call like this
    XMC_SPI_CH_Transmit(spi_master_ch, transmit_data, XMC_SPI_CH_MODE_STANDARD_HALFDUPLEX | 1); // XMC_SPI_CH_MODE_STANDARD_HALFDUPLEX  should be 5 instead of 4

    In addition the configuration of the IOs mode should be as below, i.e. the hardware control configuration is done with the later XMC_GPIO_SetHardwareControl()
    	/*GPIO Input pin configuration*/
    	master_data_pin_config.output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_MEDIUM_EDGE;
    	master_data_pin_config.output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH;
    	master_data_pin_config.mode = (XMC_GPIO_MODE_t)(XMC_GPIO_MODE_OUTPUT_PUSH_PULL);
    	XMC_GPIO_Init(P4_7, &master_data_pin_config);
    	master_data_pin_config.mode = (XMC_GPIO_MODE_t)(XMC_GPIO_MODE_OUTPUT_PUSH_PULL);
    	XMC_GPIO_Init(P4_6, &master_data_pin_config);
    	master_data_pin_config.mode = (XMC_GPIO_MODE_t)(XMC_GPIO_MODE_OUTPUT_PUSH_PULL);
    	XMC_GPIO_Init(P4_5, &master_data_pin_config);
    	master_data_pin_config.mode = (XMC_GPIO_MODE_t)(XMC_GPIO_MODE_OUTPUT_PUSH_PULL);
    	XMC_GPIO_Init(P4_4, &master_data_pin_config);
    Click image for larger version

Name:	SPI_HWCTRL.png
Views:	7
Size:	44.7 KB
ID:	3778
    Last edited by jferreira; Jan 28th, 2019 at 06:18 AM.
    The views expressed here are my personal opinions, have not been reviewed or authorized by Infineon and do not necessarily represent the views of Infineon.

+ Reply to Thread

Tags for this Thread


All content and materials on this site are provided “as is“. Infineon makes no warranties or representations with regard to this content and these materials of any kind, whether express or implied, including without limitation, warranties or representations of merchantability, fitness for a particular purpose, title and non-infringement of any third party intellectual property right. No license, whether express or implied, is granted by Infineon. Use of the information on this site may require a license from a third party, or a license from Infineon.

Infineon accepts no liability for the content and materials on this site being accurate, complete or up- to-date or for the contents of external links. Infineon distances itself expressly from the contents of the linked pages, over the structure of which Infineon has no control.

Content on this site may contain or be subject to specific guidelines or limitations on use. All postings and use of the content on this site are subject to the Usage Terms of the site; third parties using this content agree to abide by any limitations or guidelines and to comply with the Usage Terms of this site. Infineon reserves the right to make corrections, deletions, modifications, enhancements, improvements and other changes to the content and materials, its products, programs and services at any time or to move or discontinue any content, products, programs, or services without notice.