Nov 28, 2018
02:00 AM
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Nov 28, 2018
02:00 AM
Hello everyone.
How does the gate monitoring function of 1 EDI 2002a S chip carry out simulation test? What's more,
does it compare the time of the rising or falling edge of the drive signal with the input, or does it refer to the voltage value of the drive signal ( because the specification says this )?
Best regards and thanks in advanceï¼
How does the gate monitoring function of 1 EDI 2002a S chip carry out simulation test? What's more,
does it compare the time of the rising or falling edge of the drive signal with the input, or does it refer to the voltage value of the drive signal ( because the specification says this )?
Best regards and thanks in advanceï¼
Solved! Go to Solution.
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1 Solution
Nov 30, 2018
10:08 AM
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Nov 30, 2018
10:08 AM
Hi,
Thanks for your question. We are unable to answer this query on the public forum.
Pls contact your local Infineon field application engineer or sales person who can internally route the query on a secure channel to get an answer
Best regards,
Srivatsa
Thanks for your question. We are unable to answer this query on the public forum.
Pls contact your local Infineon field application engineer or sales person who can internally route the query on a secure channel to get an answer
Best regards,
Srivatsa
1 Reply
Nov 30, 2018
10:08 AM
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Nov 30, 2018
10:08 AM
Hi,
Thanks for your question. We are unable to answer this query on the public forum.
Pls contact your local Infineon field application engineer or sales person who can internally route the query on a secure channel to get an answer
Best regards,
Srivatsa
Thanks for your question. We are unable to answer this query on the public forum.
Pls contact your local Infineon field application engineer or sales person who can internally route the query on a secure channel to get an answer
Best regards,
Srivatsa