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Thread: multiple interrupts with GTM on TC275

  1. #1
    New Member New Member Michael1 is on a distinguished road
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    multiple interrupts with GTM on TC275

    Hi,

    I am quiet new to Microcontroller programming and I am about to set up a CAN bus to communicate between TC275 and XMC1400.
    First issue I ran into, is setting up a second interrupt based on a timer.
    I used the interrupt from the GTMTomTimerDemo which works fine. But as soon as I wanted to add a second interrupt in the same way it doesn't work.
    The first interrupt is still working, but the second one is not taken care of.

    Can anyone get me some help on this?

    Thanks a lot.
    BR Michael

    My main:
    Code:
    int core0_main(void)
    {
        /*
         * !!WATCHDOG0 AND SAFETY WATCHDOG ARE DISABLED HERE!!
         * Enable the watchdog in the demo if it is required and also service the watchdog periodically
         * */
        IfxScuWdt_disableCpuWatchdog(IfxScuWdt_getCpuWatchdogPassword());
        IfxScuWdt_disableSafetyWatchdog(IfxScuWdt_getSafetyWatchdogPassword());
    
        /* Initialise the application state */
        g_AppCpu0.info.pllFreq = IfxScuCcu_getPllFrequency();
        g_AppCpu0.info.cpuFreq = IfxScuCcu_getCpuFrequency(IfxCpu_getCoreIndex());
        g_AppCpu0.info.sysFreq = IfxScuCcu_getSpbFrequency();
        g_AppCpu0.info.stmFreq = IfxStm_getFrequency(&MODULE_STM0);
    
        /* Enable the global interrupts of this CPU */
        IfxCpu_enableInterrupts();
    
        /* Demo init */
        MulticanBasicDemo_init();
        printf("Multican Basic Demo INIT finished\n");
        GtmTomTimerDemo_init();
        printf("GtmTomTimerDemo_init finished \n");
        /* Initialise the I/O ports */
        digitalIO_init();       //Application with the timer
        printf("DigitalIO_init finished \n");
    
        /* background endless loop */
        while (TRUE)
        {
        	/*waitTime(100000000); // wait for about 1 sec
        	LED_toggle(Red);*/
    
           /* MulticanBasicDemo_run();
            printf("Multican Basic Demo run finished\n"); */
            REGRESSION_RUN_STOP_PASS;
        }
    
        return 0;
    }
    
    
    /** \} */
    
    IFX_INTERRUPT(ISR_Timer_1ms, 0, ISR_PRIORITY_TIMER_1MS);
    IFX_INTERRUPT(ISR_Timer_1s, 0, ISR_PRIORITY_TIMER_1S);
    
    /** \} */
    
    /** \} */
    
    /** \brief Handle 1ms interrupt.
     *
     * \isrProvider \ref ISR_PROVIDER_TIMER_1MS
     * \isrPriority \ref ISR_PRIORITY_TIMER_1MS
     *
     */
    void ISR_Timer_1ms(void)
    {
        IfxCpu_enableInterrupts();
    
        IfxGtm_Tom_Timer_acknowledgeTimerIrq(&g_GtmTomTimer.drivers.timerOneMs);
        g_GtmTomTimer.isrCounter.slotOneMs++;
    
        if (g_GtmTomTimer.isrCounter.slotOneMs % 10000 == 0)
        {
        	LED_toggle(Blue);
        }
    }
    
    void ISR_Timer_1s(void)
    {
        IfxCpu_enableInterrupts();
    
        IfxGtm_Tom_Timer_acknowledgeTimerIrq(&g_GtmTomTimer.drivers.timerOneMs);
        g_GtmTomTimer.isrCounter.slotOneMs++;
    
        if (g_GtmTomTimer.isrCounter.slotOneMs % 1000 == 0)
        {
        	LED_toggle(Red);
        }
    }
    
    /** \} */
    and my interrupt configuration:
    ConfigurationIsr.h:
    Code:
    /**
     * \file ConfigurationIsr.h
     * \brief Interrupts configuration.
     *
     * \version iLLD_Demos_1_0_1_7_0
     * \copyright Copyright (c) 2014 Infineon Technologies AG. All rights reserved.
     *
     *
     *                                 IMPORTANT NOTICE
     *
     *
     * Infineon Technologies AG (Infineon) is supplying this file for use
     * exclusively with Infineon's microcontroller products. This file can be freely
     * distributed within development tools that are supporting such microcontroller
     * products.
     *
     * THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
     * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
     * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
     * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
     * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
     *
     * \defgroup IfxLld_Demo_MulticanBasic_SrcDoc_InterruptConfig Interrupt configuration
     * \ingroup IfxLld_Demo_MulticanBasic_SrcDoc
     */
    
    #ifndef CONFIGURATIONISR_H
    #define CONFIGURATIONISR_H
    
    /******************************************************************************/
    /*-----------------------------------Macros-----------------------------------*/
    /******************************************************************************/
    
    /** \brief Build the ISR configuration object
     * \param no interrupt priority
     * \param cpu assign CPU number
     */
    #define ISR_ASSIGN(no, cpu)  ((no << 8) + cpu)
    
    /** \brief extract the priority out of the ISR object */
    #define ISR_PRIORITY(no_cpu) (no_cpu >> 8)
    
    /** \brief extract the service provider  out of the ISR object */
    #define ISR_PROVIDER(no_cpu) (no_cpu % 8)
    
    /**
     * \addtogroup IfxLld_Demo_MulticanBasic_SrcDoc_InterruptConfig
     * \{ */
    
    /**
     * \name Interrupt priority configuration.
     * The interrupt priority range is [1,255]
     * \{ */
    
    #define ISR_PRIORITY_PRINTF_ASC0_TX 5   /**< \brief Define the ASC0 transmit interrupt priority used by printf.c */
    #define ISR_PRIORITY_PRINTF_ASC0_EX 6   /**< \brief Define the ASC0 error interrupt priority used by printf.c */
    
    #define ISR_PRIORITY_TIMER_1MS      1  /**< \brief Define the 1ms timer interrupt priority.  */
    #define ISR_PRIORITY_TIMER_1S		2	/**< \brief Define the 1s timer interrupt priority.  */
    
    /** \} */
    
    /**
     * \name Interrupt service provider configuration.
     * \{ */
    
    #define ISR_PROVIDER_PRINTF_ASC0_TX IfxSrc_Tos_cpu0             /**< \brief Define the ASC0 transmit interrupt provider used by printf.c   */
    #define ISR_PROVIDER_PRINTF_ASC0_EX IfxSrc_Tos_cpu0             /**< \brief Define the ASC0 error interrupt provider used by printf.c */
    
    #define ISR_PROVIDER_TIMER_1MS      IfxSrc_Tos_cpu0 /**< \brief Define the 1ms timer interrupt provider.  */
    #define ISR_PROVIDER_TIMER_1S      	IfxSrc_Tos_cpu0  /**< \brief Define the 1s timer interrupt provider.  */
    
    /** \} */
    
    /**
     * \name Interrupt configuration.
     * \{ */
    
    #define INTERRUPT_PRINTF_ASC0_TX    ISR_ASSIGN(ISR_PRIORITY_PRINTF_ASC0_TX, ISR_PROVIDER_PRINTF_ASC0_TX)                  /**< \brief Define the ASC0 transmit interrupt priority used by printf.c */
    #define INTERRUPT_PRINTF_ASC0_EX    ISR_ASSIGN(ISR_PRIORITY_PRINTF_ASC0_EX, ISR_PROVIDER_PRINTF_ASC0_EX)                  /**< \brief Define the ASC0 error interrupt priority used by printf.c */
    
    #define INTERRUPT_TIMER_1MS         ISR_ASSIGN(ISR_PRIORITY_TIMER_1MS, ISR_PROVIDER_TIMER_1MS)           /**< \brief Define the 1ms timer interrupt priority.  */
    #define INTERRUPT_TIMER_1S         	ISR_ASSIGN(ISR_PRIORITY_TIMER_1S, ISR_PROVIDER_TIMER_1S)           /**< \brief Define the 1ms timer interrupt priority.  */
    
    /** \} */
    
    /** \} */
    //------------------------------------------------------------------------------
    
    #endif

  2. #2
    Beginner Beginner
    Infineon Employee
    Infineon Employee
    MMarquardt is on a distinguished road
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    Interrupt Chain

    Unfortunately the provided files do not help to follow the interrupt chain.
    You need to verify the following:
    1) Is the interrupt event generated inside the GTM? This means: Is the timer correctly set up? Is is counting? Do the event flags get set? Is the interrupt flag set? Search for registers name IRQ_NOTIFY
    2) Is the interrupt routed to the correct service provider (CPUx?): Check the corresponding SRC_xxxx Register. The correct register you can find in the Interrupt Router-chapter of the user manual.
    3) Do the interrupt Service Request Priority Number (SRPN) in the SRC register and the number of the interrupt service routine in the interrupt table matching? Usually defined whith the definition of the ISR.
    The views expressed here are my personal opinions, have not been reviewed or authorized by Infineon and do not necessarily represent the views of Infineon.

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