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Thread: Problems with EBU on XMC4700

  1. #1
    Beginner Beginner Query1920 is on a distinguished road
    Join Date
    Jul 2018

    Problems with EBU on XMC4700

    Hi All,

    I am having trouble interfacing XMC4700 (100 pins)with NAND flash via EBU. In my project EBU lines are shared with NAND flash and FPGA. FPGA is configured to pull up all AD/CLE/ALE lines.
    So on power up all lines are pulled up. Even though lines are pulled high, when EBU is initialized, EBU should take control of these lines and control accordingly.
    I have configured all EBU related general control and region control registers. I have made sure-
    1. EBU is enabled on power on
    2. Master mode is selected
    3. Region 0 is selected and write is enabled for region 0.
    4. All EBU related pins are configured to Hardware control as per the IO pin assignment.
    5. EBUCLK status is enabled.
    6. 16 bit mode is selected

    Inspite of all these configuration, when i try to write cmd at 0x60000000 none of the EBU related pin seems to be changing.
    For ex. since i have enabled default Region-0 in ADDRSEL register and Arb_mode as master in MODCON register, as per the user manual CS0 should go low but i dont see any changes on CS0.
    To me it looks like, even though EBU is in master mode its still acting like a No Bus mode where it doesnt have control over ports pin yet

    Just to ensure FPGA is not overwriting on AD lines, I tried toggling one of the AD line by making it GPIO and it worked as expected. \
    Below is my EBU configuration
        // These values get written to the CLC register.
           configuration.ebu_clk_config.ebu_clk_mode           = 1U;
           configuration.ebu_clk_config.ebu_div2_clk_mode      = 1U;
           configuration.ebu_clk_config.ebu_clock_divide_ratio = 1U;
        // These values get written to the MODCON register.
           configuration.ebu_mode_config.ebu_sdram_tristate   = 1U;														 
           configuration.ebu_mode_config.ebu_extlock          = 1U; 
           configuration.ebu_mode_config.ebu_arbsync          = 0U;
           configuration.ebu_mode_config.ebu_arbitration_mode = 3U;														 
           configuration.ebu_mode_config.bus_timeout_control  = 0U;
           configuration.ebu_mode_config.ebu_ale_mode         = 1U; // Output is ALE
           // These values get written to the USERCON register.
            configuration.ebu_free_pins_to_gpio.address_pins_gpio = 0x1FFU;
    	configuration.ebu_free_pins_to_gpio.adv_pin_gpio      = 0U;
           region.read_config.ebu_bus_read_config.raw0   = 0x20500024U;
           region.read_config.ebu_bus_read_config.raw1   = 0x00000000U;
           region.write_config.ebu_bus_write_config.raw0 = 0x20500004U;
           region.write_config.ebu_bus_write_config.raw1 = 0x00000000U;
    	ebu_status = XMC_EBU_Init(XMC_EBU, &configuration);
    	if (ebu_status != XMC_EBU_STATUS_OK)
    		error_flag = true;
    	XMC_EBU_ConfigureRegion(XMC_EBU, &region);
            XMC_EBU_AddressSelectEnable(XMC_EBU, 1U, 0U);
    	XMC_EBU_AddressSelectDisable(XMC_EBU, 2U, 0U);
    	XMC_EBU_AddressSelectDisable(XMC_EBU, 4U, 0U);
    Below is my configuration for ports--( i have just mentioned configuration till AD4 below but similar configuration is present for all other pins as welli.e. AD5-AD15, CLE, ALE, CS, RD And WR) 
    XMC_GPIO_CONFIG_t config;
        config.mode = XMC_GPIO_MODE_OUTPUT_PUSH_PULL;
        config.output_level = XMC_GPIO_OUTPUT_LEVEL_LOW;
        config.output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SHARP_EDGE;
        XMC_GPIO_Init(EBU_AD0_PORT, EBU_AD0_PIN, &config);
        XMC_GPIO_Init(EBU_AD1_PORT, EBU_AD1_PIN, &config);
        XMC_GPIO_Init(EBU_AD2_PORT, EBU_AD2_PIN, &config);
        XMC_GPIO_Init(EBU_AD3_PORT, EBU_AD3_PIN, &config);
        XMC_GPIO_Init(EBU_AD4_PORT, EBU_AD4_PIN, &config);
    Is there anything I am missing on my configuration ?

    Any information is appreciated.


  2. #2

    Infineon Employee
    Infineon Employee
    jferreira will become famous soon enough
    Join Date
    Oct 2012

    Maybe you are missing the clock enabling for the EBU

    The views expressed here are my personal opinions, have not been reviewed or authorized by Infineon and do not necessarily represent the views of Infineon.

  3. #3
    Beginner Beginner Query1920 is on a distinguished road
    Join Date
    Jul 2018
    Hi Jesus,

    Thank you for reply. Clk settings for EBU was enabled in my configuration.
    I am now seeing random data on EBU lines. I have one more question. Since i have selected External Memory Region 0x60000000, I am hoping that CS0 should remain low all the time ?
    Is my understanding correct ?

    The reason i am asking this is if i run my code after EBU initialization, I see CS0 alongwith the other signals like RD , WR etc keep toggling randomly.
    Is this normal behavior ?


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