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Thread: How to use 3 SPI bus interface same time with GPDMA

  1. #1
    New Member New Member smarklaw is on a distinguished road
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    How to use 3 SPI bus interface same time with GPDMA

    I have to communicate with 3 SPI devices in XMC4500 - LQFP144 device using the GPDMA. The problem is the GPDMA0 has 8 channels and I can use 2 channels for one SPI interface and next 2 channels for next SPI interface. But the problem I encounter in the ISR how to clear the EventStatus register. Since there is only one ISR and how to find out which channel to clear. Any one has an example how to use in this kind of scenarios please. I am using XMClib not Dave environment.

    Thanks
    Mark
    Last edited by smarklaw; Apr 17th, 2018 at 05:56 AM.

  2. #2
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    Hi Mark,

    I would suggest you to check default DMA IRQ handler implementation given as XMC_DMA_IRQHandler() function in xmc_dma.c file. There you will find the whole implementation but the idea would be to read the general event status register and then to check the channel event status register. Once you´ve checked the status flag of each channel, you will know which one caused the interrupt at the first place so you can clear the event status for that channel directly. As I said, check the previously mentioned function and it will be clear what can you do by yourself.

    Best regards,
    Deni
    The views expressed here are my personal opinions, have not been reviewed or authorized by Infineon and do not necessarily represent the views of Infineon.

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