I am using the DMA to Transfer data from Memory to a USICin SPI mode. In the DMA Interrupt set to "Transfer complete" I remove the slave select signal. What I see is that the last Byte is not transferred correcly (only one clock pulse instead of 8).
It looks like the Interrupt is coming when the source transfers are complete and not when the destination transfers are complete. Is this true?
Which USIC event are you using to trigger the DMA? In SPI mode you should be using the receive events. This one will tells you when the slave has received the last byte and you can safely deaasert the chip select.
As the USIC is in SPI master mode, I am using the transmit interrupt. I have found the best solution is to use the USIC TX FIFO and trigger the DMA on the TXFIFO_EVENT_CONF_STANDARD. This way the DMA can send bursts of data.
I solved the slave select problem by using the XMC_SPI_CH_DisableFEM() function. This way the slave select is automaticcaly removed when there is no more data in the FIFO.
