Strange I2C ILLD implementation

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User11554
Level 1
Level 1
Hi,

i recognized some strange oddities in the ILLD (Version 1.0.1.0.0) sample code.

What it should do: address an I2C device and read some bytes. At the end it should wait ("polling") till it finishes.



...(abbreviated)...
IfxI2c_I2c_Status IfxI2c_I2c_read(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
{
[...]

IfxI2c_writeFifo(i2c, packet);
IfxI2c_clearLastSingleRequestInterruptSource(i2c);
IfxI2c_clearSingleRequestInterruptSource(i2c);
IfxI2c_clearLastBurstRequestInterruptSource(i2c);
IfxI2c_clearBurstRequestInterruptSource(i2c);

// wait until aribtration lost, nack, or rx mode flag is set, or error occurres
while ((i2c->PIRQSM.U & ((1 << IFX_I2C_PIRQSS_AL_OFF) | (1 << IFX_I2C_PIRQSS_NACK_OFF) | (1 << IFX_I2C_PIRQSS_RX_OFF) || i2c->ERRIRQSS.U)))
{}
[...]



The "while loop" looks suspicious to me.
1. it uses the "PIRQSM" (== MASK register) instead of the status register - which is strange
2. the order of "(" and ")" looks flawed to me.
3. I don´t understand the logic AT ALL.

What this SHOULD do (as far as i understand):
- terminate if any of the flags is set OR an error occurs

What this DOES:
- run WHILE any of those mask (!) bits is set or an error is present (if the order of "(" was right - which it isn´t).

What i think, micht be correct (doing some cleanup to increase visablility):


uint32_t uint32Mask = (1 << IFX_I2C_PIRQSS_AL_OFF) | (1 << IFX_I2C_PIRQSS_NACK_OFF) | (1 << IFX_I2C_PIRQSS_RX_OFF);

while (
( (i2c->PIRQSS.U & uint32Mask) == 0) &&
(i2c->ERRIRQSS.U == 0)
)
{}
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User11554
Level 1
Level 1
As nobody seems to be able to explain that issue i state:

the ILLD contains an error in the I2C implementation: mixing up mask and state register (PIRQSM and PIRQSS).
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