What ADC measurement are you expecting to see on those channels/ what voltage is actually present on the pins?

Some possibilities cross my mind:
-If P2_PDISC bits 6 and 7 (and 8 if you are using a part where 2.7 and 2.8 share the same physical pin) are zeroed (enabling the digital input path on these pins), and you have these pins set as an input with internal pull up device active in the P2_IOCR# registers, that could be pulling the signal up, maybe?
-If the bits are set in SHS0_GNCTR00 and SHS0_GNCTR10 for a gain factor greater than 1 (3,6,12...the gains divide the reference by this amount), and your signal is greater than that divided reference, you could be 'saturating' the conversion.