XMC4800-F100K2048 support of SPI interfaces

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GoKl_4594211
Employee
Employee
I understand that the XMC4800-F100K2048 has 3 USICs with 2 channels per USIC.

In the reference manual I read that Standard, dual SPI and quad SPI are supported.
How can I find out in a reasonably quick way, whether there are any restrictions to the assignment of these three modes to the 6 interfaces?

Example: Does the XMC4800-F100K2048 provide 6 standard SPI channels (that is, 2 standard channels per USIC)?
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2 Replies
chismo
Employee
Employee
First like received
Hello,

There are no restrictions so the 6 channels can be assigned to any permutations of the 4 supported protocols (e.g. 6x standard SPI channels).

Some points to note are:
- Each USIC instance has a 64-word FIFO shared between the 2 channels of the USIC instance
- Each USIC instance provides 6 service request outputs (for interrupts, dma, etc) which are to be shared as well between the 2 channels

Regards,
Min Wei
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GoKl_4594211
Employee
Employee
Hi Min Wei,

thank you for the reply.

I'm finding that the XMC4800 documentation itself is not helping me very much to determine how to use the SPI bus and also what device pins could be used. The device offers lots of features, but Infineon does not present them very well. I had to dig deep e.g. into the huge user manual just to check, which features the XMC4800 is offering. There's a port chart, but nothing in that references SPI so you have to go on a hunt to find something that should be well described as it is for the XMC4500.

I was told that the XMC4500 still will be around for awhile. If that is so, I would use it, but if it's not I'll probably look for other microcontrollers that would give me the SPI bus functionality without the level of complexity of the XMC4800.
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