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Thread: DMA Register Mapping

  1. #1
    Beginner Beginner agrus has a spectacular aura about
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    Jan 2016

    DMA Register Mapping

    Hi all,

    I have a question regarding the mapping of DMA registers with SW structures. One can find the following structure data type in `xmc_dma.h`.

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    However, the reference manual shows the layout a bit differently, as seen below.

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    It is relatively straightforward that the members of the structure are arrays that represent collections of registers (i.e. RAWTFR, RAWBLOCK, RAWSRCTRAN... are collected under RAWCHEV[10]). Also, I have no question regarding the size of arrays - for instance, RAW* array is 32 bits long and there is 8 bits of space between 02E0 and 02E8, where STATUS* starts.

    What I don't understand is why STATUSCHEV, which is seemingly supposed to contain STATUS* register values (that are obtained by passing RAW* values and MASK* values through a bit-wise AND gate, if I were to speculate), contains the values that belong in STATUSINT? To explain, a workspace search (CTRL+ALT+G) for STATUSCHEV invocation returns the following results,

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    There are 4 other invocations that access array members [2], [4] and so forth, until [8]. These accesses fetch the combined status, which - what it seems like - is supposed to be done by accessing STATUSINT. On the other hand, STATUSINT is not invoked at all (again, as per workspace search).

    Now, the question is - which register is which. And as a follow-up - is there any file that is generated by the compiler that would show the mapping of such structures to peripheral registers? (I am thinking along the lines of .map files that show the mapping of variables in memory, etc.)

    Edit: While we are on the topic of DMAs, I was wondering if the programmable registers are the ones that GPDMA actually uses, or are there shadow registers that programmable registers are copied into?

    Thank you in advance and best regards,
    Last edited by agrus; Apr 14th, 2016 at 03:19 PM.

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