XC2768 SPI : controlling the Chip select signal CS an ( the data width / Clock sign )

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Hi everybody,
i use a XC2768 (128MHz) to control a Battery Monitor, the Bus protocol used the SPI communication is the following:


1. CS = low
2 . send X * 1-byte data, !! and that with 1-byte/clock signal. !!
3. CS Hight

I configured the SPI communication with DAVE 2.0 and obtained this Parameter and Function:

/// Configuration of the U0C0 Fractional Divider:
/// -----------------------------------------------------------------------
/// - The Normal divider is selected
/// - The step value STEP = 1022

U0C0_FDRL = 0x43FE; // load U0C0 fractional divider register

/// -----------------------------------------------------------------------
/// Configuration of the U0C0 Baudrate Generator:
/// -----------------------------------------------------------------------
/// - The selected BaudRate is 350,000 kbaud
/// - The PreDivider for CTQ, PCTQ = 0
/// - The Denominator for CTQ, DCTQ = 0
/// - The Divider factor PDIV = 90

U0C0_BRGL = 0x0000; // load U0C0 load baud rate generator
// register L

U0C0_BRGH = 0x005A; // load U0C0 load baud rate generator
// register H

-------------------------------------------------------------------------------------------------------------
void SPI_vSendData(uword uwData)
{

while(!(U0C0_PSR & 0x2000)); // wait until tx buffer indication flag is set

U0C0_PSCR |= 0x2000; // clear transmit buffer indication flag
U0C0_TBUF00 = uwData; // load transmit buffer register

} // End of function SPI_vSendData

--------------------------------------------------------------------------------------------------------------

uword SPI_uwGetData(void)
{

return(U0C0_RBUF); // return receive buffer register


} // End of function SPI_uwGetData

---------------------------------------------------------------------------------------------------------------

My Communication Functions are the following:

#define SPI_BUFFER_SIZE 16

/*** Private Global Variables ***/

uint8_t txB[SPI_BUFFER_SIZE];
uint8_t rxB[SPI_BUFFER_SIZE];

------------------------------- 1 --------------------------------------------------------------
static Bool sendCmd(uint8_t address, enum ltc6804_CC_e cmd) {

uint8_t cnt = 0;
for (cnt = 0; cnt < 16; cnt++) {
txB[cnt] = 0;
}

// assemble TX buffer
ltc6804_encode_Command(address, cmd, txB);

// send 4 bytes : command (2)| pec (2)


for (cnt = 0; cnt < 4; cnt++)
{
printf ("cnt(sendCmd) = %i\n", cnt );
printf ("txB (sendCmd) = %i\n", txB[cnt] );
SPI_vSendData(txB[cnt]);
}

return 1;

}

---------------------------------2--------------------------------------------------


Bool addressWriteCmd(
uint8_t address,
enum ltc6804_CC_e cmd,
void (*encode)(uint8_t *, void *),
void *data_s) {



// 2 cmd bytes, 2 PEC bytes, 6 reg. group bytes, 2 PEC bytes required in buffer.

// assemble TX buffer from array of commands
uint8_t cnt = 0 ;
for ( cnt = 0; cnt < 16; cnt++) {
txB[cnt] = 0;
}
// put cmd and PEC in first 4 bytes of current buffer offset
ltc6804_encode_Command(address, cmd, txB);
// put data and data PEC in 8 bytes following
encode(&txB[4], data_s);

// send 12 bytes: command (2)| pec (2)| data bytes (6)|pec (2)


for (cnt = 0; cnt < 12; cnt++)
{
printf ("cnt (writeCmd) = %i\n", cnt );
printf ("txB (writeCmd) = %i\n", txB[cnt] );
SPI_vSendData(txB[cnt]);
}

return 1;

}

----------------------------------------------3-----------------------------------------------------------------------


static Bool addressReadCmd(
uint8_t address,
enum ltc6804_CC_e cmd,
void (*decode)(void *, uint8_t *),
void *data_s) {


// 2 cmd bytes, 2 PEC bytes, 6 reg. group bytes, 2 PEC bytes

//if (address > 0x0F) {
// return -1;
// }

// assemble TX buffer
uint8_t cnt ;

//initialize buffer manually
for (cnt = 0; cnt < 12; cnt++) {
txB[cnt] = 0;
}

// put cmd and PEC in first 4 bytes of current buffer offset
ltc6804_encode_Command(address, cmd, txB);


// send and receive 8 bytes

for (cnt= 0; cnt < 12; cnt++)
{
// send 12 bytes: command(2)| pec (2)| dummy bytes(8)
SPI_vSendData(txB[cnt]);
printf ("cnt (sendreadCmd) = %i\n", cnt );
printf ("txB (readCmd) = %i\n", txB[cnt] );
// receive 12 bytes : dummy bytes(4)|data bytes(6)|pec(2)
rxB[cnt] = SPI_uwGetData() & 0x0F;
printf ("cnt (receivereadCmd) = %i\n", cnt );
printf ("rxB (readCmd) = %i\n", rxB[cnt] );
}

// decode data and data PEC in 8 bytes following 4 dummy command bytes.
decode(data_s, &rxB[4]);

return 1;
}

---------------------------------------------------------------------------------------------

I have the following problem
1- the i have a clock signal for every 1-bit
2- the CS is aktive ( low ) only for 1-byte frame
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1 Reply
chismo
Employee
Employee
First like received
Hello,

The SPI transmits/receives one data bit with each shift clock. To transmit a byte, 8 clocks are expected.
To have the effect of one byte per bus clock, the SPI shift clock has to be somehow divided down outside of the USIC channel.

Is the protocol you mentioned really based on SPI?

Regards,
Min Wei
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