Not applicable
Jun 23, 2015
07:00 AM
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Jun 23, 2015
07:00 AM
Hi,
on the XMC4500 there are pins of both ports 2 and 6 able to provide the trace signals of the ETM. My question is, how to configure which pin is used?
It seems that the default configuration is:
Trace[0]: P6.6
Trace[1]: P6.5
Trace[2]: P2.11
Trace[3]: P6.1
TraceClk: P6.0
And this is also what is used on the XMC4500 Hexagon Board. I am wondering how the chip gets this information which port-pin is used for which signal!?
I can't find anything that looks like this in the startup code. Thus my suspicion was that this configuration is really the default case of the chip if nothing gets configured and the example projects from DAVE assume that.
But then it seems a bit strange to me why the default case is a mix-up of port 2 and 6 pins, and not either all pins of port 2 or all pins of port 6.
So how and where should I configure if I use other port-pins than "default"?
on the XMC4500 there are pins of both ports 2 and 6 able to provide the trace signals of the ETM. My question is, how to configure which pin is used?
It seems that the default configuration is:
Trace[0]: P6.6
Trace[1]: P6.5
Trace[2]: P2.11
Trace[3]: P6.1
TraceClk: P6.0
And this is also what is used on the XMC4500 Hexagon Board. I am wondering how the chip gets this information which port-pin is used for which signal!?
I can't find anything that looks like this in the startup code. Thus my suspicion was that this configuration is really the default case of the chip if nothing gets configured and the example projects from DAVE assume that.
But then it seems a bit strange to me why the default case is a mix-up of port 2 and 6 pins, and not either all pins of port 2 or all pins of port 6.
So how and where should I configure if I use other port-pins than "default"?
3 Replies
Jul 08, 2015
10:52 PM
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Jul 08, 2015
10:52 PM
Hi,
I don't think there is a need for you to configure these pins as I believe this is taken care by the debugger during the initialization. In general it is not advisable to used the mentioned TRACEDATA IOs for your application as these are Hardware controlled IOs during debugging mode, meaning that software configuration to the IO will be overwritten by the peripherals. More details in "25.3 Hardware Controlled I/Os" of reference manual.
But if you are using the 10 pin cortex debug method, then it is ok to use these P6.0, P6.1 etc as GPIO or other alternate functions in your application.
I don't think there is a need for you to configure these pins as I believe this is taken care by the debugger during the initialization. In general it is not advisable to used the mentioned TRACEDATA IOs for your application as these are Hardware controlled IOs during debugging mode, meaning that software configuration to the IO will be overwritten by the peripherals. More details in "25.3 Hardware Controlled I/Os" of reference manual.
But if you are using the 10 pin cortex debug method, then it is ok to use these P6.0, P6.1 etc as GPIO or other alternate functions in your application.
Not applicable
Jul 14, 2015
01:17 AM
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Jul 14, 2015
01:17 AM
Travis wrote:
I don't think there is a need for you to configure these pins as I believe this is taken care by the debugger during the initialization.
This is exactly my problem! I am using the IAR Embedded Workbench for ARM and the IAR J-Trace Debugger. And I cannot find any possibility to give this system a configuration of the trace pins.
My only suspicion is that IAR does not care about the configuration at all and they assume the "default" configuration which is fortunately used on the Infineon Hexagon Board, too.
Jul 21, 2015
08:23 PM
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Jul 21, 2015
08:23 PM
IAR is part of our tool vendor, may I suggest that you check with IAR whom I think they should be able to support you better on this.