Oct 07, 2021
06:49 PM
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Oct 07, 2021
06:49 PM
I don't understand the WDT.
After CPU reset, WDTSCON1.REL is set to 0xFFFC.
In this case the period should be 655.35us.
(period = 2^16 - 0xFFFC) * 16384 / 100)
It will take longer to set the value in REL, so it should be reset, but....
After CPU reset, WDTSCON1.REL is set to 0xFFFC.
In this case the period should be 655.35us.
(period = 2^16 - 0xFFFC) * 16384 / 100)
It will take longer to set the value in REL, so it should be reset, but....
Solved! Go to Solution.
1 Solution
Oct 12, 2021
02:50 AM
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Oct 12, 2021
02:50 AM
Hi
After a reset, CPU0 runs and CPU0 Watchdog Timer starts automatically.
The CPU0 is running @ 300MHz & the WDT is running @ 100MHz divided by 16384, therefore the CPU0 has ample time to service the WDT to prevent reset by setting ENDINIT = 1.
After a reset, CPU0 runs and CPU0 Watchdog Timer starts automatically.
The CPU0 is running @ 300MHz & the WDT is running @ 100MHz divided by 16384, therefore the CPU0 has ample time to service the WDT to prevent reset by setting ENDINIT = 1.
1 Reply
Oct 12, 2021
02:50 AM
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Oct 12, 2021
02:50 AM
Hi
After a reset, CPU0 runs and CPU0 Watchdog Timer starts automatically.
The CPU0 is running @ 300MHz & the WDT is running @ 100MHz divided by 16384, therefore the CPU0 has ample time to service the WDT to prevent reset by setting ENDINIT = 1.
After a reset, CPU0 runs and CPU0 Watchdog Timer starts automatically.
The CPU0 is running @ 300MHz & the WDT is running @ 100MHz divided by 16384, therefore the CPU0 has ample time to service the WDT to prevent reset by setting ENDINIT = 1.