Erase Counter in TC37xx

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nsyed
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Hello,

I have below question on the erase counters in TC37xx device. Can you please clarify.

I am using TC377TP and observed below regions are allocated for Erase Counter
0xA800_0000--0xA800_3FFF - Erase Counter (PFI0)
0xA830_0000--0xA830_3FFF - Erase Counter (PFI1)

Can you please clarify what is the purpose of these Erase counters ?

On my evaluation device, I see the following records for Erase Counters. Can you please help clarify what this data means ?

A8000000| 40 04 18 84 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
A8000020| 40 04 18 84 00 00 02 00 0C 06 99 1C 00 37 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
A8001FE0| 00 00 00 00 00 C0 2F 00 01 06 99 1C 00 37 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
A8002000| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

I went through the data sheet Section 6.2.3.1.2 and found that below information is recorded
[31:0] Marker.
[63:32] Start address of the first PFp logical sector.
[71:64] Number of logical sectors erased.
[255:72] Reserved.

I could not identify why the Marker is 40041884 in some cases and why it is 00000000 in some.

Where can I get more information about these Erase counters ?
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1 Solution
Darren_Galpin
Employee
Employee
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The erase counters are simply recording which sectors have been erased, so that you can check that an erase once performed was as intended. It allows a user to check whether a set of sectors have been erased more frequently than others, which you may need to know given the lifetime cycle limits.

The bits [63:32] give the start address of the first PFp logical sector, not the sector number (see table 119 Sector Structure of PFp). Sectors are 16kB in size, and "0000_0200" doesn't correspond to a sector start address - it is an offset within sector 0. So I don't actually know what has happened here, as it isn't the start address of a sector! What commands did you run which triggered an erase?

Section 6.5.2.2.3 gives details on command sequences and usage with the erase counters, the register section explains the register settings needed for erase counter priorities (and the UCB chapter (6.8.2.11) will detail where these values can be located for loading - section 6.5.4.3.13 gives some more details as well)

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Darren_Galpin
Employee
Employee
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The erase counter is updated by hardware each time you perform an erase to the PFlash. The markers are used by internal software to identify which was the last written location - it scans through the list of markers to find the first one which is all 0 - it then knows that the last location was the one which contained the last erase. What is more odd in your case is why there is a gap between A8000020 and A8001FE0 without data - you have something in the last area of the low priority area which is marked as clear but with data in it. The marker being clear means that the data is invalid and could be overwritten.

There is some more information later in the DMU section of the NVM chapter which documents the erase counter priorities and how you can switch between high and low priority, plus which sequences to use when accessing the area for erasing.
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nsyed
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Darren Galpin wrote:
The erase counter is updated by hardware each time you perform an erase to the PFlash. The markers are used by internal software to identify which was the last written location - it scans through the list of markers to find the first one which is all 0 - it then knows that the last location was the one which contained the last erase. What is more odd in your case is why there is a gap between A8000020 and A8001FE0 without data - you have something in the last area of the low priority area which is marked as clear but with data in it. The marker being clear means that the data is invalid and could be overwritten.

There is some more information later in the DMU section of the NVM chapter which documents the erase counter priorities and how you can switch between high and low priority, plus which sequences to use when accessing the area for erasing.


Thank you for Clarifying. Can you please clarify what is the purpose of these Erase counters ? Can you please give me some application use-case where we can use these erase counters ? or is this intended for only internal use or for HSM, SOTA ?

A8000020| 40 04 18 84 00 00 02 00 0C 06 99 1C 00 37 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

In this record, the sector offset is specified as "00 00 02 00", this does not makes sense to me ? Can you please clarify . Is this sector S128 ?

Also can you please clarify "There is some more information later in the DMU section of the NVM chapter" which is this section? Is this section 6.2.3.1.2
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Darren_Galpin
Employee
Employee
First solution authored First like received
The erase counters are simply recording which sectors have been erased, so that you can check that an erase once performed was as intended. It allows a user to check whether a set of sectors have been erased more frequently than others, which you may need to know given the lifetime cycle limits.

The bits [63:32] give the start address of the first PFp logical sector, not the sector number (see table 119 Sector Structure of PFp). Sectors are 16kB in size, and "0000_0200" doesn't correspond to a sector start address - it is an offset within sector 0. So I don't actually know what has happened here, as it isn't the start address of a sector! What commands did you run which triggered an erase?

Section 6.5.2.2.3 gives details on command sequences and usage with the erase counters, the register section explains the register settings needed for erase counter priorities (and the UCB chapter (6.8.2.11) will detail where these values can be located for loading - section 6.5.4.3.13 gives some more details as well)
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nsyed
Level 5
Level 5
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Darren Galpin wrote:
The erase counters are simply recording which sectors have been erased, so that you can check that an erase once performed was as intended. It allows a user to check whether a set of sectors have been erased more frequently than others, which you may need to know given the lifetime cycle limits.

The bits [63:32] give the start address of the first PFp logical sector, not the sector number (see table 119 Sector Structure of PFp). Sectors are 16kB in size, and "0000_0200" doesn't correspond to a sector start address - it is an offset within sector 0. So I don't actually know what has happened here, as it isn't the start address of a sector! What commands did you run which triggered an erase?

Section 6.5.2.2.3 gives details on command sequences and usage with the erase counters, the register section explains the register settings needed for erase counter priorities (and the UCB chapter (6.8.2.11) will detail where these values can be located for loading - section 6.5.4.3.13 gives some more details as well)


Thank you for the clarification. One of the boards which I have, does not allow us to flash and I was just investigation to see if I can get any clue with these erase counters.
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