How to trigger burst of 'N' ADC readings on XMC4800

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User22026
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Hello,

I have a CCU4 slice configured to fire an event at the exact time I need ADC conversions to happen.

There are two ADCs converting in parallel, each with a single channel input, so there is no real arbitration for signal input.

If I need to do 256 consecutive conversions on each channel that are 500 nanoseconds each, what is the best general approach for this?

I'm hoping for as little software/ISR overhead as possible. The conversions should write to DMA and only interrupt when the burst is done.

I can set up a PWM to fire an event at the end of the 128 conversions, a "stop conversion" signal, if that's helpful.

Are there any DAVE examples that would be a good starting point for burst conversions?

Gary
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1 Solution
Vasanth
Moderator
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250 sign-ins 500 solutions authored First question asked
Hi Gary,

Copying Equidistant Sampling section from the reference manual.

20.9.2 Equidistant Sampling
To optimize the input data e.g. for filter or audio applications, conversions can be
executed in a fixed timing raster. Conversions for equidistant sampling are triggered by
an external signal (e.g. a timer). To generate the trigger signal synchronous to the
arbiter, the ADC provides an output signal (ARBCNT) that is activated once per
arbitration round and serves as timing base for the trigger timer. In this case, the arbiter
must run permanently (GxARBCFG (x = 0 - 3).ARBM = 0). If the timer has an
independent time base, the arbiter can be stopped while no requests are pending. The
preface time (see Figure 20-25) must be longer than one arbitration round and the
highest possible conversion time.
Select timer mode (TMEN = 1 in register GxQCTRL0 (x = 0 - 3) or GxASCTRL (x = 0 -
3)) for the intended source of equidistant conversions. In timer mode, a request of this
source is triggered and arbitrated, but only started when the trigger signal is removed
and the converter is idle.
To ensure that the converter is idle and the start of conversion can be controlled by the
trigger signal, the equidistant conversion requests must receive highest priority. The
preface time between request trigger and conversion start must be long enough for a
currently active conversion to finish.
The frequency of signal REQTRx defines the sampling rate and its high time defines the
preface time interval where the corresponding request source takes part in the
arbitration.
Depending on the used request source, equidistant sampling is also supported for a
sequence of channels. It is also possible to do equidistant sampling for more than one
request source in parallel if the preface times and the equidistant conversions do not
overlap.

Best Regards,
Vasanth

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4 Replies
Vasanth
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250 sign-ins 500 solutions authored First question asked
Hi Gary,

Kindly refer the following document and example codes to get acquainted with the VADC

Appnote: https://www.infineon.com/dgdl/Infineon-VADC-XMC4000-AP32305-AN-v01_02-EN.pdf?fileId=5546d4624e765da5...
Examples:https://www.infineon.com/dgdl/Infineon-VADC-XMC4000-AP32305_Example_Code-AN-v01_02-EN.zip?fileId=554...

Meanwhile let me get back to you specifically regarding burst mode conversions.

Best Regards,
Vasanth
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Vasanth
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250 sign-ins 500 solutions authored First question asked
Hi Gary,

Additionally could you give some insight about your application use case. How are you planning to store the 256 results ? Does storing the data in the internal FIFO of the ADC(Size=4) and triggering the ISR when its full till
256 samples are done sound as a better solution to you ?

Best Regards,
Vasanth
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User22026
Level 1
Level 1
Vasanth wrote:
Hi Gary,

Additionally could you give some insight about your application use case. How are you planning to store the 256 results ? Does storing the data in the internal FIFO of the ADC(Size=4) and triggering the ISR when its full till
256 samples are done sound as a better solution to you ?

Best Regards,
Vasanth


Hi Vasanth,

I tried sending a reply but for some reason it didn't post. Our use case is to sample a linear CCD array. We need time equidistant sampling on a burst of 256 readings sampled at 2MHz.
I was struggling getting the DMA going but I forgot to call the "DMA_CH_Enable()" routine and after doing that, DMA looks like it's working fine. I am simply transferring
from the ADC results register to DMA and then doing another copy after DMA completes.

So the last thing I have to solve is to understand the latency from when I provide a trigger input to the ADC and when it actually samples. As long as this
latency is consistent and known, I can use the 2MHz CCU8 trigger. I would prefer not to have to go through using the ADC arb clock as a trigger source if I don't have to.
I have set the arbitration mode to start after a conversion request and not run permanently and set the ARB to run minimum cycles. So, is there any way to calculate the ADC trigger
latency or directly measure the end of conversion point via hardware? I know I can generate an ADC result event and fire a software interrupt to set an IO line but then I have the latency
of the interrupt and the code to set the IO line so this isn't ideal.

rgds,

Gary
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Vasanth
Moderator
Moderator
Moderator
250 sign-ins 500 solutions authored First question asked
Hi Gary,

Copying Equidistant Sampling section from the reference manual.

20.9.2 Equidistant Sampling
To optimize the input data e.g. for filter or audio applications, conversions can be
executed in a fixed timing raster. Conversions for equidistant sampling are triggered by
an external signal (e.g. a timer). To generate the trigger signal synchronous to the
arbiter, the ADC provides an output signal (ARBCNT) that is activated once per
arbitration round and serves as timing base for the trigger timer. In this case, the arbiter
must run permanently (GxARBCFG (x = 0 - 3).ARBM = 0). If the timer has an
independent time base, the arbiter can be stopped while no requests are pending. The
preface time (see Figure 20-25) must be longer than one arbitration round and the
highest possible conversion time.
Select timer mode (TMEN = 1 in register GxQCTRL0 (x = 0 - 3) or GxASCTRL (x = 0 -
3)) for the intended source of equidistant conversions. In timer mode, a request of this
source is triggered and arbitrated, but only started when the trigger signal is removed
and the converter is idle.
To ensure that the converter is idle and the start of conversion can be controlled by the
trigger signal, the equidistant conversion requests must receive highest priority. The
preface time between request trigger and conversion start must be long enough for a
currently active conversion to finish.
The frequency of signal REQTRx defines the sampling rate and its high time defines the
preface time interval where the corresponding request source takes part in the
arbitration.
Depending on the used request source, equidistant sampling is also supported for a
sequence of channels. It is also possible to do equidistant sampling for more than one
request source in parallel if the preface times and the equidistant conversions do not
overlap.

Best Regards,
Vasanth
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