Apr 27, 2021
04:08 PM
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Apr 27, 2021
04:08 PM
Hello,
I am currently setting up ETM Trace for the XMC4700.
Port 7-8 is currently configured for the TRACECLCK pin (see https://www.segger.com/products/debug-probes/j-trace/models/j-trace/)
Port 8-1 is for TRACEDATA[0]
The issue I'm running into is trace stops working as soon as this function is called:
I'm not sure how to change the TRACECLCK source to the system pll, if that's even possible. Or, am I configuring the trace settings incorrectly?
Thanks!
I am currently setting up ETM Trace for the XMC4700.
Port 7-8 is currently configured for the TRACECLCK pin (see https://www.segger.com/products/debug-probes/j-trace/models/j-trace/)
Port 8-1 is for TRACEDATA[0]
The issue I'm running into is trace stops working as soon as this function is called:
XMC_SCU_CLOCK_SetSystemClockSource(XMC_SCU_CLOCK_SYSCLKSRC_PLL);
I'm not sure how to change the TRACECLCK source to the system pll, if that's even possible. Or, am I configuring the trace settings incorrectly?
Thanks!
Solved! Go to Solution.
1 Solution
Jun 04, 2021
11:03 AM
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Jun 04, 2021
11:03 AM
The issue seems to be clock speed and pin drive strenghts.
That is why previously, as soon as this function is called the trace stops working:
Our esteemed colleague pointed us to an errata in the datasheet that mentions a couple ports have some drive strength values that cannot be written via software.
XMC4700_XMC4800_AA-ES-v01_04-EN page 41 and 42
The workaround for the ETM is to run the CPU at a slower clock speed. In our case, 72MHz allowed us to get trace working again.
That is why previously, as soon as this function is called the trace stops working:
XMC_SCU_CLOCK_SetSystemClockSource(XMC_SCU_CLOCK_SYSCLKSRC_PLL);
Our esteemed colleague pointed us to an errata in the datasheet that mentions a couple ports have some drive strength values that cannot be written via software.
XMC4700_XMC4800_AA-ES-v01_04-EN page 41 and 42
The workaround for the ETM is to run the CPU at a slower clock speed. In our case, 72MHz allowed us to get trace working again.
2 Replies
May 26, 2021
08:21 PM
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May 26, 2021
08:21 PM
1: Where do you get the JLinkScript?
2: More information about the trace, please refer to the following linker:
https://forum.segger.com/index.php/Thread/6342-SOLVED-OZONE-JTrace-Configuring-alternate-trace-pins-...
https://www.segger.com/products/development-tools/ozone-j-link-debugger/technology/trace-features-li...
2: More information about the trace, please refer to the following linker:
https://forum.segger.com/index.php/Thread/6342-SOLVED-OZONE-JTrace-Configuring-alternate-trace-pins-...
https://www.segger.com/products/development-tools/ozone-j-link-debugger/technology/trace-features-li...
Jun 04, 2021
11:03 AM
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Jun 04, 2021
11:03 AM
The issue seems to be clock speed and pin drive strenghts.
That is why previously, as soon as this function is called the trace stops working:
Our esteemed colleague pointed us to an errata in the datasheet that mentions a couple ports have some drive strength values that cannot be written via software.
XMC4700_XMC4800_AA-ES-v01_04-EN page 41 and 42
The workaround for the ETM is to run the CPU at a slower clock speed. In our case, 72MHz allowed us to get trace working again.
That is why previously, as soon as this function is called the trace stops working:
XMC_SCU_CLOCK_SetSystemClockSource(XMC_SCU_CLOCK_SYSCLKSRC_PLL);
Our esteemed colleague pointed us to an errata in the datasheet that mentions a couple ports have some drive strength values that cannot be written via software.
XMC4700_XMC4800_AA-ES-v01_04-EN page 41 and 42
The workaround for the ETM is to run the CPU at a slower clock speed. In our case, 72MHz allowed us to get trace working again.