SRAM Corruption After Application Reset

[User16740]

Hi All,

Does anyone know how to set the TC275D into a Safe State so that the CSS0, 1 & 2 fields from the RSTCON2 register do not report corrupted SRAM after an Application reset?

The User Manual says that a '0' for CSS0, 1 or 2 means that 'safe state not achieved prior to last reset'.

There are a few references to Safe State, but I cannot find a clear link.

[Darren_Galpin]

These come from the CPUs and indicate that the problem was that it hasn't correctly flushed before being reset, so something was wrong in the sequence preparing for reset, or you have a RAM problem which prevented this. Can only suggest that you run a debugger, halt before the reset is applied, and step through/interrogate the CPU to find which step isn't completing correctly. I've next to no experience in this area though..... 🙂

[User16740]

The reset sequence is definitely not correct. My customer (there own design) is resetting the Aurix by turning off the power to the TLF35584 Watchdog via a combination of the Ignition signal and an Aurix GPIO!

I was interested is knowing if it's possible to force the CPU Cores in a safe state, but I guess that this is what the System / Application reset is for.

Alternatively, maybe there is way to reset the CSSn flags after the restart?

I'm still unsure why the flags are set in the first place, as this is supposed to be Cold Start.

[Darren_Galpin]

The CSSn bits are defined as rh, and there is no clear for them in another register, so no, I don't believe that they can be cleared without clearing the original issue and doing a reset. If it was due to an SRAM corruption, cleaning the SRAM and hitting reset should solve the problem.