Dma

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User21011
Level 1
Level 1
I have studied the DMA provided by Infineon in the "xmc-4100_xmc-4200 microcontroller". I have the following questions and
it would be highly appreciatable if anyone will answer them.

1) When DMA is the flow controller then when the hardware or software handshaking interface will be used?

2) Is the hardware handshaking interface includes only the request and acknowledge signals or single and burst transactions also?
If yes then how these are connected with DMA?

3) What is the process and purpose of single and burst transaction requests from source and destination peripherals using
hardware or software handshaking interface when DMA is a flow controller or when peripheral is a flow controller?

4) How is the hardware handshaking interface works using DLR (DMA line router)?

5) I want to know about the ISRs which are used for the configuration of DMA, block complete interrupt, and to end the multi-block transfer.
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Vasanth
Moderator
Moderator
Moderator
250 sign-ins 500 solutions authored First question asked
Hi,

The GPDMA section in the technical reference manual has more details about
the DMA under GPDMA section.

1. This is dependent on the source and destination of transfer. Kindly check the image attached

4884.attach

2. You can see the handshake step in both hardware and software handshake mechanisms. Its forwarded through DLR in hardware handshake.
4885.attach

With ISR request and register writes it is handled in software handshake.
4886.attach

3.Generally, the GPDMA tries to transfer the data using burst transactions and, where possible, fill or empty the channel FIFO in single bursts - provided that the software has not limited the burst length.

4. Before the transfer can begin the GPDMA and DLR units must be set up according to the user requirements. Once the peripheral (source or destination) is ready for a transaction it sends a service
request. This request is taken by the DLR which in turn forwards it to the GPDMA( See attached image above).This is repeated until the programmed transfer is complete.

5. In case of software handshake, before the transfer can begin the GPDMA and NVIC units must be set up according to the user requirements. Once the peripheral (source or destination) is ready for a transaction it sends a service
request to the CPU. The interrupt service routine then uses the software registers(eg: REQSRCREG), to initiate and control a DMA transaction. The GPDMA finally executes the transaction

Best Regards,
Vasanth

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1 Reply
Vasanth
Moderator
Moderator
Moderator
250 sign-ins 500 solutions authored First question asked
Hi,

The GPDMA section in the technical reference manual has more details about
the DMA under GPDMA section.

1. This is dependent on the source and destination of transfer. Kindly check the image attached

4884.attach

2. You can see the handshake step in both hardware and software handshake mechanisms. Its forwarded through DLR in hardware handshake.
4885.attach

With ISR request and register writes it is handled in software handshake.
4886.attach

3.Generally, the GPDMA tries to transfer the data using burst transactions and, where possible, fill or empty the channel FIFO in single bursts - provided that the software has not limited the burst length.

4. Before the transfer can begin the GPDMA and DLR units must be set up according to the user requirements. Once the peripheral (source or destination) is ready for a transaction it sends a service
request. This request is taken by the DLR which in turn forwards it to the GPDMA( See attached image above).This is repeated until the programmed transfer is complete.

5. In case of software handshake, before the transfer can begin the GPDMA and NVIC units must be set up according to the user requirements. Once the peripheral (source or destination) is ready for a transaction it sends a service
request to the CPU. The interrupt service routine then uses the software registers(eg: REQSRCREG), to initiate and control a DMA transaction. The GPDMA finally executes the transaction

Best Regards,
Vasanth
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