Power NMOS Vgd specification

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User20492
Level 1
Level 1
First question asked
I used NMOS IPD60R180P7S for reverse polarity protection on the negative live of the power supply (circuit is attached). Initially a simple diode is used on the positive line but due to USB loop current issue, the protection must be relocated to the negative line using an NMOS.
When i did EMC surge test, for negative surge the Vgd drop to -50V for around 50us. The device is working fine but i am wondering if this -50V is a concern since this is greater than |Vgs|?

Can the device be damaged by |50V| Vgd for 50us? I checked in the data sheet there is no specification for Vgd. What is the maximum Vgd DC or transient value that will not damage the device?

Thank You.
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1 Solution
User13282
Level 3
Level 3
25 replies posted 10 replies posted 5 replies posted
This is for VGS: Please refer to the maximum ratings in the datasheet. You will find the maximum gate voltage (static) as +/-20V and maximum gate voltage (dynamic, AC (f>1 Hz)) as +/-30V.
VGDmax is very much higher than VGSmax, so in real application you firstly would exceed VGS/VDS values before VGD.

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User13282
Level 3
Level 3
25 replies posted 10 replies posted 5 replies posted
This is for VGS: Please refer to the maximum ratings in the datasheet. You will find the maximum gate voltage (static) as +/-20V and maximum gate voltage (dynamic, AC (f>1 Hz)) as +/-30V.
VGDmax is very much higher than VGSmax, so in real application you firstly would exceed VGS/VDS values before VGD.
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