AURIX TC27x, Cache & DSPR/PSPR hierarchy

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cross mob
User19956
Level 1
Level 1
Hi
I have a question with Cache & DSPR/PSPR hierarchy in AURIX TC27x.

4612.attach
4610.attach

Which Picture is right?

If Cache & DSPR/PSPR hierarchy are same, What is the role of Cache?
I am understanding that it takes 0 waitstate when CPU access DSPR/PSPR, Why do we need a cache?
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2 Replies
MoD
Employee
Employee
50 likes received 500 replies posted 100 solutions authored
Picture 2 is correct. The PCache is not used for code fetches from PSPR and the DCache is not used for data accesses to DSPR.
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Darren_Galpin
Employee
Employee
First solution authored First like received
PSPR is a scratch pad RAM, so local storage. The cache on the other hand you cannot write to - it stores data which has been read from cachable memory locations in the system so that it can be accessed again if re-used shortly afterwards, to save the load time. so the CPU could read from PFlash using a cachable address, and the read data would be stored in the cache. If the program looped, the data would then already be in the cache and it can read the data from the cache, saving the PFlash latency. The CPU would use the PSPR for temporarily writing and reading from.
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