EVADC in Multicore

[User20085]

Hi all,

I use the Aurix TC387 and actually i'm using 2 cores and I splitted the EVADC HW group over these two cores the acquisation is working properly. but I want to do is that I want to acquire an Analog pin located in core 1 from core 0 is that possible or not ?

Is it possible that the EVADC offers this king of redendancy check over cores or not ?

waiting for your feedbacks, and thanks in advance ! 🙂

Best regards,
Mohamed

[NeMa_4793301]

Hi Mohamed. I'm not what you mean by "split the group over two cores". All cores are able to access all peripherals simultaneously by default. Of course, this can cause no end of trouble - nothing prevents you from calling iLLD functions that control the same peripheral from multiple cores, and that can easily lead to problems with lost interrupts, conflicting DMA, etc., etc.

Since you mentioned "redundancy check", I presume your application has some safety requirements, or at least needs a higher level of reliability. The TC3xx Safety Manual describes the right way to achieve these goals - see Analog Acquisition ASIL D and Analog Acquisition ASIL B. The approach is generally to have an ECU design that brings the same input signal into two different EVADC groups. With that setup, one core could control the first EVADC, and a second core the second converter.

[User20085]

Hello @UC_wrangler,

Thank you for your feedback and I really appreciate it.

what I mean by "split the group over two cores" is that I split the AdcHwUnits which contains adc channels over two cores.

for example :

CORE0 contains AdcHwUnit0 and AdcHwUnit1
CORE1 contains AdcHwUnit2 and AdcHwUnit3

Based on The TC3xx Safety Manual, I think it's not possible to acquire same ADC input from two different core.

Best regards,
Mohamed

[NeMa_4793301]

Sounds like you're on the right track :). Trying to use the same converter group across multiple cores is what leads to trouble - e.g., CORE0 and CORE1 accessing AdcHwUnit0 is a bad idea.

More specifically: it's very difficult to make a Freedom From Interference claim when cores are competing for the same resource.

[User20085]

Yeah your right, so what I didt is that I acquire the same ADC input via two different EVADCs located in two different cores (as seen in picture below).



NB : I didn't specify the secondary and Fast compare blocks because I don't use them for the moment 😉

This approach is working properly.

Thank you for your interaction ! 🙂
see you in new topic 😉

[User20162]

hi,
I am new to aurix TC3x series, i have tried EVadc demo queue program in my TC399 board, but the result is showing different in each scan. i am confused regarding that and also i have tried upto
7 adc in a same group, there also same problem i am facing. i dont know where i missed the things. i planned to use nearly 60 adc scan for my testing purpose, could anybody help me to sort
this out as soon as possible.

moreover i dont see any adc interrupt based demo code in iLLD, where do i get that sample code. it will helpful for me.