How to check pending SMU NMI Trap for Core 1 before enabling TRAPDIS0

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User9635
Level 4
Level 4
50 replies posted 50 questions asked 25 replies posted
Hello Support,
In Aurix 2G, SMU NMI Trap for each core is disabled by default using SCU TRAPDIS0/1 Registers.
How to check if there is a pending SMU NMI Trap for Core 1?
I want to check for pending SMU NMI Trap Flag for Core 1 before enabling Core 1 NMI Trap via SCU TRAPDIS0 register.
Please provide me the way to check for existing pending NMI Trap signal to Core 1.
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Best Regards
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Darren_Galpin
Employee
Employee
First solution authored First like received
There is an AEX register in the SMU which has an NMISTS bit, showing whether an NMI alarm was detected or not - this would be set, but is not on a per CPU basis.
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