Aurix 2G SMU ALM8[10] configured as RESET will reset which cores?

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User9635
Level 4
Level 4
50 replies posted 50 questions asked 25 replies posted
Hello Support,
In Aurix 2G, SMU ALM8[10] is for Core 0 WDT Timeout Alarm.
When this ALM8[10] is configured as RESET within the SMU using SMU_RESET [0x6] configuration, then is there any way to reset only CPU CORE0 and not other Cores?
Because if I use AGC.RCS field, then for ALM8[11] SMU_RESET [0x6], I can't have CPU CORE1 Reset for Core 1 WDT Timeout Alarm.
hence, this question.
Essentially, I want for Core 0 WDT Timeout Alarm to have only reset Core 0. -- ALM8[10] as SMU_RESET [0x06]
For Core 1 WDT Timeout Alarm to have only reset Core 1. -- ALM8[11] as SMU_RESET [0x06]
For Core 2 WDT Timeout Alarm to have only reset Core 2. -- ALM8[12] as SMU_RESET [0x06]

I don't think AGC.RCS will do that as it is a Global Configuration.
Is there any per Alarm channel Reset Configuration possible?
Please let me know with some more details if it is a feasible plan within Aurix 2G.
Best Regards
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4 Replies
MoD
Employee
Employee
50 likes received 500 replies posted 100 solutions authored
Reset (hardware and software) is always a chip wide reset, the complete device will be reset. You can only make a reset with your own software (e.g. manual reset of all necessary registers or reset via CPU Kernel Reset Registers). You can configure the WDT alarms to generate a NMI (will be distributed to all CPUs) and check in the handler if the corresponding alarm is triggered and execute your manual software reset. Otherwise you can configure the WDT alarms to different interrupts which are configured to 1 CPU only.
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User9635
Level 4
Level 4
50 replies posted 50 questions asked 25 replies posted
Hello Support,
"Reset (hardware and software) is always a chip wide reset,"
Can you please tell me if it is always Chip-Wide Reset, then what is the expected behavior of AGC.RCS=0 bit-field in SMU?
When AGC.RCS=0, then also Reset will propagate to the respective CPU Cores?
4355.attach
Best Regards
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MoD
Employee
Employee
50 likes received 500 replies posted 100 solutions authored
When you configure an alarm to SMU_RESET[0x6] as you wrote, then the reset request is send to the SCU and an application or system reset (chip wide reset) will be occur.
If you configure an alarm to SMU_CPU_RESET[7] then the reset request will be send to all CPU which are selected in the AGC register. You can select this only globally, you can't configure 1 alarm to reset a specific CPU and other alarm to reset another CPU.
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User19711
Level 1
Level 1
MoD wrote:
Reset (hardware and software) is always a chip wide reset, the complete device will be reset. You can only make a reset with your own software (e.g. manual reset of all necessary registers or reset via CPU Kernel Reset Registers). You can configure the WDT alarms to generate a NMI (will be distributed to all CPUs) and check in the handler if the corresponding alarm is triggered and execute your manual software reset. Otherwise you can configure the WDT alarms to different interrupts which are configured to 1 CPU only.


Hello support,
could you please elaborate how to reset via CPU Kernel Reset Registers as I tried to reset by writing ‘1’ into both of reset registers CPU0_KRST1.RST and CPU0_KRST0.RST but nothing affected however CPU0_KRST0.RSTSTAT bit = 0x2 which indicates that is kernel reset was requested by software.
Kindly advice if there are any additional configurations required to trigger the CPU reset or if the mentioned configurations are enough so how to make sure that the CPU0 reset is done correctly.
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