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Thread: Debug and CPU registers error using DAP IF

  1. #1
    Beginner Beginner alexeyPhyton is on a distinguished road
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    Debug and CPU registers error using DAP IF

    Dear All,
    I try to FLASHing TC397XE chip using the DAP IF.
    With DAP telegrams , I can halt main CPU (using the HARR issue). I saw, that corresponds bit are set (HARR bit in IOINFO register). Also, I can enable debug unit and unlock interface (IF_LCK bit is cleared and OEN bit is set).
    Then, I can switch on SUPERVISOR MODE and I saw, that mode is set. Using the DAP, I can successfully read any CERBERUS and CPU registers. But, when I try to write the same registers, I always get BUS_WR_ERROR. By following the access rules (look at pic, yellow rect.),
    I set all need permissions. ACCEN0/1 registers in all "1" too (it mean's that writing is permitted ) But, I get bus writing error any way.
    By the way, I can successfully write and read RAM memory (from 0x70000000 address space). So, it seems, that IO_WRITE_WORD and IO_BLOCK_WRITE telegrams are work right. But, I can't write any registers from 0xFxxxxxxx address space.
    A couldn't understand the reason: where is I'm wrong. I looking for qualified help from here.
    Last edited by Bernd Brachmann; May 25th, 2020 at 01:13 AM. Reason: Deleted the attachment -> restricted document

  2. #2
    Advanced Advanced UC_wrangler will become famous soon enough
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    Do you get the same bus error with COMDATA? If so, can you post your telegrams?

    The "E" registers are ENDINIT protected, so you'll either need to go through the unlock sequence - see 9.4.4 The Endinit Functions in AURIXTC3XX_um_part1_v1.5.pdf. Alternately, you could "cheat" by setting CBS_OSTATE.ENIDIS via CBS_OCNTRL=0xC0, so that all writes via Cerberus bypass the ENDINIT protection system.

  3. #3
    Beginner Beginner alexeyPhyton is on a distinguished road
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    Quote Originally Posted by UC_wrangler View Post
    Do you get the same bus error with COMDATA? If so, can you post your telegrams?

    The "E" registers are ENDINIT protected, so you'll either need to go through the unlock sequence - see 9.4.4 The Endinit Functions in AURIXTC3XX_um_part1_v1.5.pdf. Alternately, you could "cheat" by setting CBS_OSTATE.ENIDIS via CBS_OCNTRL=0xC0, so that all writes via Cerberus bypass the ENDINIT protection system.

    For register access I use only RW mode, instead of COMMUNICATION mode. Also, I use Clear ENDINIT and Safety ENDINIT, if it need for some registers. I saw, that ENDINIT did cleared in that cases.

  4. #4
    Advanced Advanced UC_wrangler will become famous soon enough
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    Quote Originally Posted by alexeyPhyton View Post
    Also, I use Clear ENDINIT and Safety ENDINIT, if it need for some registers. I saw, that ENDINIT did cleared in that cases.
    Wait wait the WDTCPU registers are at 0xFxxxxxxx too (e.g., SCU_WDTCPU0CON0 at 0xF0036100).

    What if you write to an unrestricted register like P00_OUT (0xF003A000)? Does that also fail?

  5. #5
    Beginner Beginner alexeyPhyton is on a distinguished road
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    I can't write CBS_OCNTRL register too..... I got WR_BUS_ERROR too...

  6. #6
    Beginner Beginner alexeyPhyton is on a distinguished road
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    Quote Originally Posted by UC_wrangler View Post
    Wait wait the WDTCPU registers are at 0xFxxxxxxx too (e.g., SCU_WDTCPU0CON0 at 0xF0036100).

    What if you write to an unrestricted register like P00_OUT (0xF003A000)? Does that also fail?
    Yes. you right, sorry. I checked and I can write SCU_WDTSCON0_REG register without error. But I can't write to PC register for example....

  7. #7
    Beginner Beginner alexeyPhyton is on a distinguished road
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    Yes, I check and I can also successfully write P00

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