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Thread: Memory Test of CPU0 DSPR, TC277 C & D steps,

  1. #1
    New Member New Member Bendertron is on a distinguished road
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    Memory Test of CPU0 DSPR, TC277 C & D steps,

    Hello, everyone

    I'm trying to use memory test of CPU0 DSPR in my code using code from application note AP32342. The version of that code is 3.2a.

    The main problem of my case is reset of CPU0 when MBIST_CPU_RAM_Test_List contains MC_CPU0_DSPR.
    When I comment out that region of memory the test performs without any issues. But when MC_CPU0_DSPR contains that region CPU0 just resets after function of ram test is called.
    But it looks like that this is not a reset, because there is no any flag in RSTSTAT register after reset. Looks like CPU Program Counter just starts count from it's initial vaule.

    The NonDestructive test is executed by CPU0.

    Could anyone help me with that problem?

  2. #2
    Advanced Advanced UC_wrangler will become famous soon enough
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    Try AP32197 instead - version 3.5 is what I see on MyICP:
    https://myicp.infineon.com/sites/mic...TC27x_v3.5.zip

    The MTU is very fussy about the magic values in RAM_Test_cfg_TC27x.c / RDBFL_TAB[]. Are you certain your DSPR values are correct?
    Code:
       MC_TAB_ID(MC_CPU0_DSPR), 			0x0000,0x0003,0x00C0,0x3000,0x0000,0x000C,0x0300,0xC000,0x0000,0x0030,0x0C00,TAB_END,

  3. #3
    Advanced Advanced UC_wrangler will become famous soon enough
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    Try AP32197 instead - version 3.5 is what I see on MyICP:
    https://myicp.infineon.com/sites/mic...TC27x_v3.5.zip

    The MTU is very fussy about the magic values in RAM_Test_cfg_TC27x.c / RDBFL_TAB[]. Are you certain your DSPR values are correct?
    Code:
       MC_TAB_ID(MC_CPU0_DSPR), 			0x0000,0x0003,0x00C0,0x3000,0x0000,0x000C,0x0300,0xC000,0x0000,0x0030,0x0C00,TAB_END,
    EDIT: I see you're testing DSPR0 with CPU0. Be very careful that the compiler isn't generating anything that would cause RAM to be accessed while performing the MBIST. That will cause a permanent stall until the AURIX is power cycled. Avoiding RAM is why there's hand-coded assembly language in MBIST_driver_macros_TASKING_asm.txt.
    Last edited by UC_wrangler; Apr 7th, 2020 at 10:19 AM.

  4. #4
    New Member New Member Bendertron is on a distinguished road
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    Thanks for your information. At first i should say the code I used is from AP32197. Seems like AppNote has new number in newer version.
    Considering magic numbers you provided, numbers rdbfl_tab in the code I have are the same. I'll try to investigate if there is any code trying to access to RAM

  5. #5
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    There is another strange thing is that the same code in debug mode runs flawlessly. But if I start that code with my bootloader CPU resets

  6. #6
    Advanced Advanced UC_wrangler will become famous soon enough
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    That usually points to watchdog trouble - in debug mode, the watchdog system is disabled by default.

    In most debuggers, you can change this behavior, so that the watchdog system is active, but suspends if the CPU hits a breakpoint.

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