LBIST Run Completion Reset and RAMIN field of HF_PROCONRAM for Aurix 2G

[User9635]

Hello Support,

At the end of successful run of LBIST, there is a reset automatically triggered by the TC3xx parts [Aurix 2G].
Under that Reset due to LBIST, if the contents of
HF_PROCONRAM.RAMIN=2'b10
HF_PROCONRAM.RAMINSEL=6'b0000_00
HF_PROCONRAM.LMUINSEL=7'b0000_000
were set via UCB_DFLASH_ORIG settings,

then will all the RAM be initialized as selected by LMUINSEL and RAMINSEL fields?

I am assuming it is not, because it is not a Cold Reset condition.
Please confirm.

Best Regards

[NeMa_4793301]

If RAMIN=2 (initialize RAM on cold power-on reset), RAM will be initialized after an LBIST. That's because the reset after an LBIST is treated as a cold power-on reset:

3.1.2.2 Checks performed by CHSW and exit information
Note: Device start-up after LBIST execution is handled by TC3xx Firmware as cold power-on, respectively the CHSW results indicated in such a case correspond to the checks executed upon this type of device reset.

[User9635]

Hello Support,
So RAM will be cleared by SSW even for the case when BMI.LBISENA [bit 8] = 0 ?
Is that correct?

Best regards

[NeMa_4793301]

I'm not sure what you're asking now.

RAMIN=2 means RAM is initialized after a cold power-on reset, including after an LBIST.

If you set BMI.LBISTENA=0, RAM is initialized after a cold power-on reset, and the SSW doesn't perform an LBIST. But if your application performs an LBIST, a cold power-on reset will occur after the LBIST completes, and RAM will be initialized.