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I`ve begun to write a bootloader for my project. For that reason my bootloader has to be able write data in the PFLASH part in the memory. I write a test code to see whether can i write
datas in the Flash memory part. My reference documant was this:
https://www.infineon.com/dgdl/Infineon-AURIX_Program_Memory_Unit-Training-v01_00-EN.pdf?fileId=5546d...
Unfortunately i couldn't able to write datas in any PFLASH part of memory. But fortunately, I was able to write datas in the DFLASH part. you can see below my example code for flash memory:
uint32_t testArray[64]={
0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555
};
uint16_t i;
//////////////////////////////////////////////////////PFLASH//////////////////////////////////////////////////77
for(i=0; i<32; i++){
IfxFlash_clearStatus(IFXFLASH_NUM_MODULES);
IfxFlash_enterPageMode(0xA0038000 + i*0x8);
IfxFlash_loadPage2X32(0xA0038000 + i*0x8, testArray[2*i], testArray[2*i+1]);
IfxFlash_writePage(0xA0038000 + i*0x8);
IfxFlash_waitUnbusy(0, IfxFlash_FlashType_Fa);
}
////////////////////////////////////////////////DFLASH///////////////////////////////////
for(i=0; i<32; i++){
IfxFlash_clearStatus(IFXFLASH_NUM_MODULES);
IfxFlash_enterPageMode(0xAF000000 + i*0x8);
IfxFlash_loadPage2X32(0xAF000000 + i*0x8, testArray[2*i], testArray[2*i+1]);
IfxFlash_writePage(0xAF000000 + i*0x8);
IfxFlash_waitUnbusy(0, IfxFlash_FlashType_P0);
}
I think for the PFLASH unit of memory theres a protection and if the code is once executed on the hardware and then no one can write any data in the PFLAH section.
But it should be an setting to diasble the write protection.
I ll be appreciated if someone can help me further?
best regards
Ismail
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However, I don't know what the IfxFlash_xxx functions are doing... In particular how the addresses are used. You need to write the command sequences with the DFlash address, for example .AA50 would have to be represented as an address of 0xAF00AA50 and so on... Only the PA would be 0xA0038000.
Referring to the user's manual:
6.5.2.2 Flash Operations
All Flash operations except memory mapped reads are performed with command sequences. Write accesses are treated as follows:
• Write accesses to the PFLASHp memory range are refused with bus error.
• Write accesses to the DFLASH0 and DFLASH1 memory ranges are interpreted as a command cycles belonging to the respective command sequences.
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You must make sure no one is accessing the PFlash module (including the other cores) while you are updating the PFlash.
uint16 password = IfxScuWdt_getSafetyWatchdogPassword();
uint64 *src = (uint64 *)&testArray[0];
uint64 *dst;
for (uint32 i = 0; i < 8; i++) {
IfxFlash_clearStatus(IFXFLASH_NUM_MODULES);
IfxFlash_enterPageMode(0xA0038000 + i * 0x20);
/*Wait until HF_STATUS.PFPAGE = ‘1’ or HF_STATUS.DFPAGE = ‘1’ depending upon the Flash target, or fail if HF_ERRSR.SQER = ‘1’ or HF_ERRSR.PROER = ‘1’.*/
dst = (uint64 *)(0xAF0055F0);
for (uint32 j= 0; j < 4; j++)
*dst = *src++;
IfxScuWdt_clearSafetyEndinitInline(password);
IfxFlash_writePage(0xA0038000 + i * 0x20);
/*Wait until HF_OPERATION.PROG = ‘1’ or fail if (HF_ERRSR.SQER = ‘1’ or HF_ERRSR.PROER = ‘1’). */
/*Wait for 2*1/fFSI ns (DFlash) or 3*1/fFSI + 8*1/fSRI ns (PFlash). */
IfxScuWdt_setSafetyEndinitInline(password);
IfxFlash_waitUnbusy(0, IfxFlash_FlashType_P0);
/* Check for HF_ERRSR.PVER flag.
Fail if HF_ERRSR.OPER = ‘1’.*/
}
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I ve made the changes according suggestions by cwunder and everything is working
Thank you again
best regards
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In your example code I see the following comments :
/*Wait for 2*1/fFSI ns (DFlash) or 3*1/fFSI + 8*1/fSRI ns (PFlash). */
Can you please provide me the corresponding Document Section Number and Snippet of the above comments related info within the Aurix 2G Part 1 Revision 1.4 User Manual?
Or any other Infineon Documents where it is mentioned as in the comments above.
Best Regards
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Sequence for Programming
Sequence for Erasing
On page 422 of the AURIXTC3XX_um_part1_v1.4.pdf.
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HI cwunder:
I had configured in application project Ifx_Cfg_SswBmhd.c file the start address is oxA00008000:
bmhd0~bmhd3's configuration in application project is same,
const Ifx_Ssw_Bmhd bmhd_0_orig = {
0x00FE,
0xB359,
0xA0008000, /**< \brief 0x004: .stad: User Code start address*/
0x31795570,
0xCE86AA8F,
}
and in the bootloader project the start address is 0xa000000, bmhd0~bmhd3's configuration in bootloader project is same,
const Ifx_Ssw_Bmhd bmhd_0_orig = {
0x00FE,
0xB359,
0xA0000000, /**< \brief 0x004: .stad: User Code start address*/
0x31795570,
0xCE86AA8F,
}
I want to know that whether the configuration is reasonable or not. thank you.
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I don't understand why you have two settings for the BMHD UCBs one for the application and one bootloader. After a reset the SSW determines the valid BMHD and once this is found allows the your code to begin execution from the start address (STAD).
Note from the datasheet: Max. 100 erase/program cycles per UCB, max 500 erase/program cycles for all UCBs together
Generally you would configure the BMHD for the bootloader and then it determines to jump to the application or not.
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Thank you for your reply and reminding about the UCBs erase/program cycles! I think bootloader and application are two independent projects, the bootloader starts from 0XA0000000, and the application starts from 0XA0008000, so that the two settings for the BMHD UCBs are defined for each project. I don't understand very well you mentioned above that how can one BMHD UCBs setting for both bootloader and application can work. please give me some guidance and advice about that. Thank you!
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Hi Tonny. Generally, BMHDs point to the bootloader. The bootloader decides what to do by checking to see if an application is present: if not, it stays in the bootloader. If an application is present, the bootloader either waits a small amount of time for a new CAN/Ethernet message, or checks a flag in RAM to see if the application requested a jump to the bootloader. If no message is received or the flag to stay in the bootloader is not set, the bootloader jumps to the application.
BMHD UCBs are usually set only once in manufacturing, and not changed by the bootloader or application.
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Hi μC_Wrangler. Thank you for your guidance, and I understand what you mean about UCBs. I have another question about you mentioned above. Check flag in RAM, how to realize it and how it worked. please give me some details relevant.
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Hi Tonny. Let's see if I can make this work via text:
In the application, to invoke the bootloader, your code would do something like:
int bootloader_flag @ 0x70000000; // must be linked to the same address in bootloader and application
#define BOOTLOADER_FLAG_INVOKE_BOOTLOADER 0x87654321;
bootloader_flag = BOOTLOADER_FLAG_INVOKE_BOOTLOADER;
SCU_SWRSTCON.B.SWRSTREQ=1; // cause a reset
On the bootloader side, your code should do something like this:
#pragma noclear
int bootloader_flag @ 0x70000000; // must be linked to the same address in bootloader and application
#pragma clear
#define BOOTLOADER_FLAG_INVOKE_BOOTLOADER 0x87654321;
if( bootloader_flag != BOOTLOADER_FLAG_INVOKE_BOOTLOADER )
{
// jump to application
}
// otherwise, stay in the bootloader
// at some point in the bootloader, in response to a message to jump
// to a newly flashed application, the bootloader would clear the flag
// and jump to it, like so:
bootloader_flag = 0;
SCU_SWRSTCON.B.SWRSTREQ = 1;
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Hi μC_Wrangler:
Thanks very much for your careful and detailed reply. I have got understand what you said. Thanks again.