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Thread: TriBoard TC277 - QSPI FIFO buffer not working

  1. #1
    New Member New Member deepakseshan1 is on a distinguished road
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    TriBoard TC277 - QSPI FIFO buffer not working

    Hello All,
    I am using Triboard TC27 working on QSPI non-DMA method. When I tried to transfer the the data from the TxBuffer Master(0x01,0x02,0x03,0x04) and the slave receive Buffer receiving data as (0xff, 0xff, 0xff,0xff).
    I used Master and slave communication from the Triboard itself(QSPI 0 Master and QSPI 2 Slave).

    When I tried the same program another triboard TC277(my colleague's) the same program works fine.

    Kindly help me whether the issue is in board or the program? If the issue is board how to reset it back to normal.

    Thank you everyone in advance,

    Deepak

  2. #2
    Dear deepakseshan1 and all,

    I am also using TC277 Triboard and the QspiCpuDemo of iLLD demo code, but QSPI2 Slave can not work properly.

    I also used the Logical Analyzer to check the transmission, I could count the SCLK and MTSR, The QSPI0 Master transmits data correctly, but the MRST only show the 0x00 and 0xff periodically as the attached picture shows.

    I don't have another TC277 Triboard to verify.

    Does anyone have experience about this kind of issue?

    Please kindly advise.

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  3. #3
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    VincentWan is on a distinguished road
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    Hi

    did u connect the QPSI0 & QSPI2 port pins together on the TC277 triboard extension board? (ie port pin P20.14 to P15.5, P20.12 to P15.7)
    when using the debugger, did the interrupts come in? (ie, ISR_qspi0_Tx, ISR_qspi0_Rx)
    please check.
    The views expressed here are my personal opinions, have not been reviewed or authorized by Infineon and do not necessarily represent the views of Infineon.

  4. #4
    Hi VincentWan,

    Thanks for your reply.

    I connected the QSPI0 & QSPI2 port together via the extension board on the TC277 triboard as the picture show, and I removed the R302 and the EEPROM from the TC277 triboard too.

    When I use the debugger, the interrupts come in as the pictures showed.

    The SFR View 1 showed the [Slave Transmit and Receive] in QSPI2_GLOBALCON after ISR_qspi2_Rx interrupt happed.

    But the spi0RxBuffer is still received 0xff (255), (no 0x00 (0) after I removed the EEPROM), and spi2RxBuff is still received 0x00 (0).

    Do you have any idea for this issue?

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  5. #5
    Advanced Advanced
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    teoBits is on a distinguished road
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    Hello deepakseshan1,

    did you try using the example SPI_CPU_1? It has been reworked on the last release, together with its tutorial: SPI_CPU_1 tutorial

    It has been developed for the KIT_AURIX_TC297_TFT board but it can be easily ported to any other kit.


    hope it helps,
    teoBits
    The views expressed here are my personal opinions, have not been reviewed or authorized by Infineon and do not necessarily represent the views of Infineon.

  6. #6
    Hi teoBits,

    Very thanks for your reply.

    The example code could run on the TC277 Triboard properly.

    This information is really helpful.

    Thank you again,
    Wayne Chen

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