Aurix 2G TC3xx LBIST execution and PLL configuration sequence

[User9635]

Hello Support,
In Aurix 2G TC3xx [TC387] devices, LBIST can be run when the CPU is put into 300MHz PLL Clock mode instead of default Back-up clock?
If no, then please point me to the User Manual Section/Page number where it is mentioned that should not be done at all.
I am assuming before LBIST execution one can configure PLL to 300MHz and switch the CPU clock without any adverse effect.
Please confirm.
Best Regards

[cwunder]

The user's manual clearly states the LBIST clock is supplied from the backup clock and must be scaled down for a stable LBIST execution. See the SCU chapter 9-50. Review the LBISTCTRL1.LBISTFREQU settings.

[NeMa_4793301]

Running the LBIST after PLL initialization will also result in various SMU alarms. Follow the startup sequence application note to avoid headaches.