I am using SBC (tle9273) as the slave which communicates to RH850F1KHD8 microcontroller (Master) through SPI communication.

When I send a command through SPI, when probed through CRO, MISO data is found to be improper even if SCL CS, MOSI signals are proper.

The following configurations are being done.

1. SPI -FIFO mode selected

2. LSB is transmitted first

3. SPI Mode1 used for communication

4. Port Muxing are corrected as per my hardware.

5. The Baud rate of SPI is 2MHz

The Data in MISO Lines are being corrupted / Slave is not sending any data and buffer content is being sent out.

Also, to be specific, the data on MOSI is according to the value sent. On the MISO data line, there is hike (Proper bit 1 Set every time) even before clock is supplied.

CRO images are attached for the above explained case. Kindly ignore the noise in the signals.

Figure 1: The below figure is clock(Yellow) and chip select(Green).

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Figure 2: MOSI (green) and CLK (Yellow)
In the figure below, MOSI is 0x41 with LSB first. It comes only when clock is supplied.

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Figure 3: MISO (green) and CLK (Yellow)
In the figure below, On the MISO data line, there is a Hike (1-bit data) even before the clock is supplied. This happens only for first SPI transmit.
For the next SPI data transmit, this scenario is not observed.

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Please let me know
1. What could be the reason for this ?
2. Is there a way to read something from SBC to determine or debug what happens when data is written or read ?