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Thread: DAP and Tricore PFLASH programming

  1. #11
    New Member New Member alexeyPhyton is on a distinguished road
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    Quote Originally Posted by UC_wrangler View Post
    Are you writing the registers through DAP, or from executing code? The registers are Safety ENDINIT protected, so a simple write will result in a bus error.

    If you're writing them directly via DAP, consider disabling ENDINIT protection by setting CBS_OCNTRL to 0xC0.

    Here's a small code example of setting an SCU Safety ENDINIT protected register, using the iLLD IfxScuWdt functions:
    Code:
    uint16  endinitSfty_pw;
    
    endinitSfty_pw          = IfxScuWdt_getSafetyWatchdogPassword();
    
    /* Select fback (fosc-evr) as CCU input clock */
    IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
    
    while (SCU_CCUCON0.B.LCK != 0U)
    {
    	/*Wait till ccucon0 lock is set */
    	/*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
    }
    
    SCU_CCUCON0.B.CLKSEL = 0; /*Select the EVR as fOSC for the clock distribution */
    SCU_CCUCON0.B.UP     = 1; /*Update the ccucon0 register */
    IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
    I already tried to do in this way and result the same - bus error, while CCUCON0.LCK is clear (((

  2. #12
    Advanced Advanced UC_wrangler will become famous soon enough
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    OK then show us the code

  3. #13
    New Member New Member alexeyPhyton is on a distinguished road
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    Quote Originally Posted by UC_wrangler View Post
    OK then show us the code
    There are a part of code. For debugging, I put real registers address:


    //---------------------------------------------------------------------------------
    ushort _pass = DAPgetSafetyWatchdogPassword();
    //---------------------------------------------------------------------------------

    DAPSetAddr(0xF000047C);
    _bf[0] = DAPClientReadW();
    DisplayL("OCNTRL", _bf[0]);
    _bf[0] |= 0x00C0;
    DAPClientWriteW(_bf[0]);

    DAPclearSafetyEndinit( _pass );

    do{
    DAPClientReadBlock(&_bf[0], 1, 0xF0036030);
    }
    while(_bf[0] & (1<<31));

    DisplayL("CCUCON0", _bf[0]);

    _bf[0] &= ~(3<<28); // clear the CLKSEL bits
    DAPClientWriteBlock(&_bf[0], 1, 0xF0036030); // !!!!!!!!!!!!!!!!!!!!!!!!!!!

    _bf[0] |= 1<<30; // set UP bit to 1
    DAPClientWriteBlock(&_bf[0], 1, 0xF0036030);

    //DisplayL("Safety ENDINIT was set", 1);

    DAPsetSafetyEndinit( _pass );

    DAPClientReadBlock(&_bf[0], 1, 0xF0036130);
    DisplayL("TRAPDIS_0 WR", _bf[0]);

    DAPClientReadBlock(&_bf[0], 1, 0xF0036010);
    DisplayL("OSCCON RD", _bf[0]);


    The bus error appear during the first CCUCON0 writing attempt (marked //!!!!!!!!!!!!!!!!)
    Last edited by alexeyPhyton; Jan 15th, 2020 at 01:32 AM.

  4. #14
    Advanced Advanced UC_wrangler will become famous soon enough
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    Hi Alexey. Is the CPU stopped in this situation - i.e., has your tool issued a Halt After Reset Request?
    Can you verify that CBS_OSTATE (0xF0000480) has ENIDIS set (bit 4)?

  5. #15
    New Member New Member alexeyPhyton is on a distinguished road
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    Quote Originally Posted by UC_wrangler View Post
    Hi Alexey. Is the CPU stopped in this situation - i.e., has your tool issued a Halt After Reset Request?
    Can you verify that CBS_OSTATE (0xF0000480) has ENIDIS set (bit 4)?
    I sent HARR to CPU before. And I saw, that CPU halted. But ENIDIS bit isn't set , when I perform Safety Endinit procedure. Probably, this is a reason, why I can't to write CCUCON0 register.

  6. #16
    Advanced Advanced UC_wrangler will become famous soon enough
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    Quote Originally Posted by alexeyPhyton View Post
    I sent HARR to CPU before. And I saw, that CPU halted. But ENIDIS bit isn't set , when I perform Safety Endinit procedure. Probably, this is a reason, why I can't to write CCUCON0 register.
    Hmm... is there trouble in DAPClientWriteBlock? Can you write to unprotected RAM locations like, say, 0x70000000?

  7. #17
    New Member New Member alexeyPhyton is on a distinguished road
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    Quote Originally Posted by UC_wrangler View Post
    Hmm... is there trouble in DAPClientWriteBlock? Can you write to unprotected RAM locations like, say, 0x70000000?
    Yes, I can read and write RAM from 0x70000000.
    May be ClearSafetyEndinit doesn't work properly? I do it like I found it in iLLD driver.

  8. #18
    Advanced Advanced UC_wrangler will become famous soon enough
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    Can you list the exact sequence of register writes that your ClearSafetyEndinit is doing?

  9. #19
    New Member New Member alexeyPhyton is on a distinguished road
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    Quote Originally Posted by UC_wrangler View Post
    Can you list the exact sequence of register writes that your ClearSafetyEndinit is doing?

    Below, the Clear Safety Endinit procedure:


    void DAPclearSafetyEndinit( uint16 password )
    {
    uint32 _con0, _rel, _tmp32;

    DAPClientReadBlock( &_con0, 1, SCU_WDTSCON0_REG);
    _rel = _con0 & 0xFFFF0000;

    if (_con0 & SCU_WDT_LCK)
    {
    /* see Table 1 (Password Access Bit Pattern Requirements) */
    _con0 = (1 << SCU_WDTSCON0_ENDINIT_OFF) |
    (0 << SCU_WDTSCON0_LCK_OFF) |
    (password << SCU_WDTSCON0_PW_OFF) | _rel;
    DAPClientWriteBlock( &_con0, 1, SCU_WDTSCON0_REG);
    }

    /* Clear ENDINT and set LCK bit in Config_0 register */
    _con0 = ( 0 << SCU_WDTSCON0_ENDINIT_OFF) |
    (1 << SCU_WDTSCON0_LCK_OFF) |
    (password << SCU_WDTSCON0_PW_OFF) | _rel;
    DAPClientWriteBlock( &_con0, 1, SCU_WDTSCON0_REG);

    /* read back ENDINIT and wait until it has been cleared */

    do
    {
    DAPClientReadBlock( &_con0, 1, SCU_WDTSCON0_REG);
    }
    while ((_con0 & SCU_WDT_ENDINIT ));
    }
    Last edited by alexeyPhyton; Jan 22nd, 2020 at 12:58 AM.

  10. #20
    Advanced Advanced UC_wrangler will become famous soon enough
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    That looks like a faithful translation of the iLLD's Ifx_Ssw_clearSafetyEndinitInline() to me.

    Can you read back the value of SCU_WDTSSR after each write to SCU_WDTSCON0?

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