Dec 06, 2019
08:57 AM
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Dec 06, 2019
08:57 AM
5 Replies
Dec 07, 2019
08:10 AM
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Dec 07, 2019
08:10 AM
Your problem description does not provide enough information to understand the issue you have.
Dec 07, 2019
09:37 AM
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Dec 07, 2019
09:37 AM
Is there any time out or buffer limitation on QSPI.
Dec 07, 2019
10:16 AM
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Dec 07, 2019
10:16 AM
Yes, the FIFO's are only four deep and you can have a Phase Transition (Data Not Available) interrupt. You also have an error interrupt and would know if you had an overrun or overrun on the FIFO's.
Without knowing what you are doing it just guessing...
Without knowing what you are doing it just guessing...
Dec 08, 2019
03:33 AM
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Dec 08, 2019
03:33 AM
I am using QSPI in polling mode.
Can you share any documents for QSPI.
Can you share any documents for QSPI.
Dec 08, 2019
08:07 PM
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Dec 08, 2019
08:07 PM
The user's manual is your best source of information. If you are communicating with an external memory device generally you would configure the QSPI for "continuous long data mode". With this mode you write the BACON register with last = 0. Then you can have multiple data transfers until you have one data transfer remaining but you first write the BACON register only with last=1. This assumes you are controlling the chip select via hardware. Then exchange your last data transfer.
If you are polling (which is not the most efficient as this function is blocking). For the data exchange on QSPI3 you could do something like this:
If you are polling (which is not the most efficient as this function is blocking). For the data exchange on QSPI3 you could do something like this:
uint32 QSPI3_ExchangeData(uint32 value)
{
QSPI3_DATAENTRY0.U = value;
while (QSPI3_STATUS.B.RXFIFOLEVEL == 0);
return QSPI3_RXEXIT.U;
}