MULTICAN with P1.12 and P1.13

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User18231
Level 1
Level 1
Hi

I want to try the MULTICAN on a XMC4700 Device Kit Board.
With internal Loop-Back-Mode my driver works well (Two Nodes with 4 MOs,TX and RX interrupts come in).

If I want to change CAN Node1 to pins TX P1.12 and RX 1.13 nothing works anymore (No TX interrupts, no signal on the lines).

For some reasons I wrote a bare metal driver (Please don't answer with the question: "Why did you write a bare metal driver?").

Here my code for the pins:

...
//
// GPIO init for Output TX P1.12
//
PORT1->OUT |= (1 << PORT1_OUT_P12_Pos); // Level high
PORT1->PDR1 &= ~(0x7 << PORT0_PDR1_PD12_Pos); // P1.12 pad as strong driver with sharp edge;
PORT1->IOCR12 |= (0x12 << PORT0_IOCR12_PC12_Pos); // alternate output function 2 for CAN1_TX

//
// GPIO init for Input RX P1.13
//
PORT1->IOCR12 &= ~(0x1FF << PORT1_IOCR12_PC13_Pos); // to zero as input, No internal pull device active

// rxsel
CAN_NODE1->NCR = (1 << CAN_NODE_NCR_CCE_Pos) | CAN_NODE_NCR_INIT_Msk;
CAN_NODE1->NPCR = 0x02; // no loop back mode, rxsel CAN1: P1.13 / N1_RXDC
CAN_NODE1->NCR &= ~((1 << CAN_NODE_NCR_CCE_Pos) | CAN_NODE_NCR_INIT_Msk); // reset CCE and INIT

Has anyone an advice?


Regards
Michael
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1 Reply
jferreira
Employee
Employee
10 sign-ins 5 sign-ins First like received
Hi,

You need to enable the configuration change of the node1.

Node x Control Register (CAN_NCRx (x = 0-5)) bitfield CCE.
CCE Configuration Change Enable
0B: The Bit Timing Register, the Port Control Register,and the Error Counter Register may only be read.All attempts to modify them are ignored.
1B: The Bit Timing Register, the Port Control Register,and the Error Counter Register may be read and written.

Look at XMC_CAN_NODE_EnableConfigurationChange() of the XMCLib.

Regards,
Jesus
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