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Type: Posts; User: cwunder

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  1. Replies
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    Here is the code snippet that I used: void...

    Here is the code snippet that I used:

    void CopyStandbyRedundancyData(void){
    uint32_t *src = (uint32_t *)0xD0002000;
    volatile uint32_t data;


    /* Preparation before to enter Stand-by mode */
  2. Replies
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    For the TC2xx devices the fBAUD2 is derived from...

    For the TC2xx devices the fBAUD2 is derived from either the fPLL or fBACK and you can also divide it. It depends on the settings in the CCUCON0 register.
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    Yes, the application can program a UCB. However...

    Yes, the application can program a UCB. However for these UCB's this doesn't make sense to me. You would enable the protects in your end-of-line with a password writing the UCB's. Then in the field...
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    The Formula: 4100 This what you asked: ...

    The Formula:

    4100

    This what you asked:


    Now you ask
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    From the User’s Manual TLEAD = TBAUD2 *...

    From the User’s Manual
    TLEAD = TBAUD2 * BACON.LPRE * BACON.LEAD

    For the calculation of the delay:
    TBAUD2 = 1 / fBAUD2
    TLEAD = TBAUD2 * 4^LPRE * (LEAD+1)

    You provided the following parameters...
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    154

    It seems the "access terms" table is not in the...

    It seems the "access terms" table is not in the TC22x user's manual. This table is defined in the other user's manuals like on the TC27x-D User's Manual. download this and search for "access terms"...
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    Assuming 200MHz (fBAUD2), I calculate 80 nsec not...

    Assuming 200MHz (fBAUD2), I calculate 80 nsec not 80 usec. You should also check the output driver strength for SPI0 pins are set to speed grade 1.
  8. It is complaining that it can't find "beginning"...

    It is complaining that it can't find "beginning" and "end" of the heap in your lsl file and you are assigning it in your source file somewhere.

    For example in user stack in cstart.c
    /* linker...
  9. Replies
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    When you write to a register you need to check...

    When you write to a register you need to check its write access rights. The CLC register write access requires you to be in supervisor mode, access protection allowed for this master and you have...
  10. Yes, please see section "4.4. Multi-core Hardware...

    Yes, please see section "4.4. Multi-core Hardware Debugging" in the debugger manual
  11. Replies
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    When you write to any special function register...

    When you write to any special function register (SFR) there are write attributes associated with them. For example do you need to be in supervisor or user mode and if it is a critical register it...
  12. You didn't say which AURIX device you are using? ...

    You didn't say which AURIX device you are using?

    You can check with Infineon but I believe this is a documentation oversight issue (meaning this bit doesn't exist for your device) as the...
  13. Is there something else you need as you have the...

    Is there something else you need as you have the API or a tooling command to accomplish the task at hand.

    The user's manual states the distribution of the OCDS documentation is restricted.
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    Please search the AURIX user's manual for Bit...

    Please search the AURIX user's manual for Bit Function Terminology

    rwh: As rw, but bit or bit field can be also set or reset by hardware.
    rh: This bit or bit field can be modified by hardware...
  15. Basically the Trace32 cannot connect to the...

    Basically the Trace32 cannot connect to the AURIX.

    Do you have any application code already in the device (PFlash) and is it otherwise functional? What is the level of the ESR0 signal?

    Some...
  16. For ease of use the AURIX has the capability to...

    For ease of use the AURIX has the capability to suspend the watchdogs when connected to a debugger (default setting). This is to avoid nuisance watchdog timeouts that will reset your system while you...
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    I would suggest to use the bifaces interface and...

    I would suggest to use the bifaces interface and change the configuration to point to the Tasking toolchain you are using. There are base projects for each device series which you can import into...
  18. Some comments: 1) The Watchdog timers only count...

    Some comments:
    1) The Watchdog timers only count up (they do not count down)
    2) The Watchdog timers are enabled by default after reset, however if you are connected to a debugger they are by...
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    This means it is using the interrupt vector table...

    This means it is using the interrupt vector table for CPU0. On TC399 you can have 6 CPUs meaning you can have 6 interrupt vector tables.
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    In the user's manual you can review the User...

    In the user's manual you can review the User Configuration Block options.



    For PFlash protection this is controlled by the UCB_PFlash. Within this UCB you have the option to protect the PFlash...
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    Do you mean HighTec EDV-Systeme GmbH? You open...

    Do you mean HighTec EDV-Systeme GmbH?

    You open an example project that uses interrupts.

    Basically you need to install the interrupt and then enable it. Here is a snippet that I did in the past...
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    Sorry that you had troubles: I did what to point...

    Sorry that you had troubles: I did what to point out that the user's manual does describe how the parity is being generated and used. From the users perspective you don't need to worry about it as it...
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    To create an interrupt entry it usually involves...

    To create an interrupt entry it usually involves two parts. You have to have a table defined in your linker/locator file and then you need to create the entry with a keyword or macro in a source file...
  24. Thread: Tc275 - gtm -

    by cwunder
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    Have you looked at section "25.22.2.1 Port to GTM...

    Have you looked at section "25.22.2.1 Port to GTM Control Registers"? Then for what is available at the TIMx look at Table 25-7x.
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    Each interrupt source is assigned a unique...

    Each interrupt source is assigned a unique interrupt priority number known as the Service Request Priority Number (SRPN). On receipt of an interrupt request from an interrupt source the SRPN is used...
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