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Type: Posts; User: UC_wrangler

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  1. Sorry, I'm not following you here - how can you...

    Sorry, I'm not following you here - how can you have outputs be both synchronous and have a different duty cycle and frequency with 20 ms spacing? A picture might help.
  2. Replies
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    3,912

    For those of you who have no problem logging into...

    For those of you who have no problem logging into MyICP, here's a direct link to the TriBoard TC2x5 documentation:
    ...
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    360

    You're right about the RIF, but it only supports...

    You're right about the RIF, but it only supports 4 internal ADCs.

    The EVADC details are in the TC3xx User Manual (AURIXTC3XX_um_part2_V1.2.0.pdf). You can download it from MyICP once someone has...
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    715

    Are you using the iLLD, or making your own SPI...

    Are you using the iLLD, or making your own SPI code? Can you share a code snippet?
  5. Can you be a little clearer about what you need?...

    Can you be a little clearer about what you need?

    Do you need 8 different output pins, or 8 different output *ports* (e.g., P8, P11, etc.)?

    Do you need 8 TOM outputs with different frequencies? ...
  6. Replies
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    360

    Hi SmileOn. The challenge here is that the RIF...

    Hi SmileOn. The challenge here is that the RIF only supports the RXS and similar external ADCs.

    You can get up to 2.4 MSPS out of the EVADC, but I'm guessing that for your application, you need...
  7. Thread: .elf and

    by UC_wrangler
    Replies
    6
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    437

    Hi KDN. Where is your application - in PFLASH,...

    Hi KDN.

    Where is your application - in PFLASH, or in RAM? When you say the controller doesn't retain its code, what address are you looking at to know it's gone?

    Do you have boot mode headers...
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    Hi vvssg. Instead of inventing a whole new API,...

    Hi vvssg. Instead of inventing a whole new API, have you tried using the sample code from the iLLD? In the help file (under Modules -> MULTICAN -> How to use the CAN Interface driver), there's a...
  9. The TC26x only contains a logic-level PSI5...

    The TC26x only contains a logic-level PSI5 interface. There is no direct PHY for PSI5 on the AURIX.
  10. Thread: .elf and

    by UC_wrangler
    Replies
    6
    Views
    437

    Is your code targeting RAM...

    Is your code targeting RAM (0x50000000-0x700FFFFF), or flash (starting with 0x8 or 0xA)? If it's running from RAM, that would explain why the AURIX doesn't retain it through a power cycle ;)
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    Hi VVSS. For PFLASH, the erased state (all 0s)...

    Hi VVSS. For PFLASH, the erased state (all 0s) always causes an uncorrectable ECC read error.

    An erase is only necessary before a write if the destination is not already erased.

    For example:...
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    3,540

    Hi Pirate02. The IfxCpu_Perf functions are part...

    Hi Pirate02. The IfxCpu_Perf functions are part of Infineon's Low Level Device (iLLD) driver library. Add those to your project and then try something like this:



    #include "IfxCpu.h"

    void...
  13. Replies
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    250

    Hi Lukas_G. The nodePointer array configures how...

    Hi Lukas_G. The nodePointer array configures how each CAN node's service requests are sent to the Interrupt Router. It's used inside of IfxMultican_Can_initModule():


    /* Configure interrupt...
  14. Hi rivaldo01. You can set the bit timing to be...

    Hi rivaldo01. You can set the bit timing to be driven by the oscillator directly with this function:


    IfxMultican_setInputClock( mcanSFR, IfxMultican_ClockSelect_fosc0 );

    But this is one area...
  15. Hi Mattias. You can modify your iSystem...

    Hi Mattias. You can modify your iSystem initialization file to set up the debug system so that the watchdog system is still active when the debugger is connected, and when the CPU hits a breakpoint,...
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    @MoD I think you meant to post the public link ;)...

    @MoD I think you meant to post the public link ;)

    https://myicp.infineon.com/SitePages/Home.aspx
  17. Hi Specimen. The AURIX NBTRx isn't the same as...

    Hi Specimen. The AURIX NBTRx isn't the same as Vector's BTR0 and BTR1 registers. Just make sure the sampling point and baud rate is the same. SJW=2 is probably your best bet.

    In your last...
  18. Hi specimen. Yes, I should have said...

    Hi specimen. Yes, I should have said samplePoint=7500 :)

    Working backwards from NBTR=0x3EC9, only the sample point needs some tweaking (but it's probably close enough to work):

    - BRP=9 means:...
  19. Hi Specimen. The Vector tool shows the bit...

    Hi Specimen. The Vector tool shows the bit timing information in a fancy graphical way. Compare that to Figure 21-12 CAN Bus Bit Timing Standard on page 1641 of tc23x_tc22x_um_v1.1.pdf:
    - Sync Seg...
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    Hi Lukas_G. There's a demo for the ERU in the...

    Hi Lukas_G. There's a demo for the ERU in the latest iLLD - see ScuEruDemo, \0_Src\AppSw\Tricore\Demo_Illd\ScuEruDemo.c.

    To use ESR1 as a wakeup, try setting ESR1 as a wakeup...
  21. Hi Rombic. Try enabling the On-Chip Debug System...

    Hi Rombic. Try enabling the On-Chip Debug System with this sequence first:



    #include "IfxCbs_reg.h"

    // Unlock debug system if it's not already unlocked
    if( !(__mfcr(CPU_DBGSR) &...
  22. Hi specimen. What CAN bit timing parameters are...

    Hi specimen. What CAN bit timing parameters are you using on the Vector side? By default, the iLLD uses these parameters - see IfxCan_Can_initNodeConfig in IfxCan_Can.c:

    .baudRate ...
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