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Type: Posts; User: cwunder

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  1. Replies
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    Usually you define the BIV value and space in the...

    Usually you define the BIV value and space in the lsl file and then take the linker symbol for this and use it in your startup code. Look at the base project in Bifaces and see the file ifx_Ssw_Tc0.c...
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    Yes, refer to tool vendor's documentation (user...

    Yes, refer to tool vendor's documentation (user guide) for the toolchain that you are using (i.e. Using Assembly in the C Source: __asm() ). If you want to write your own assembly routine (.s file) ...
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    The BIV should be double word aligned. The 8K is...

    The BIV should be double word aligned. The 8K is a space reservation if you assume 32 bytes per entry and 256 entries (8192). You can also set the VSS=1 such that the full vector table space would...
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    160

    If you look under module connections (section...

    If you look under module connections (section 27.5.2 on the TC27x) you will find this statement:
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    162

    In your analysis of only programming 1/4 of the...

    In your analysis of only programming 1/4 of the erased pages, what does that mean? Every UCB requires a valid CONFIRMATION word to be written at its expected location within every UCB. The...
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    419

    The TC1766 is a legacy device and not recommend...

    The TC1766 is a legacy device and not recommend for new designs.

    You have the source pointer set the SPRAM and the destination is DMA_target which no clue where you have this.

    In addition you...
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    419

    Simple answer, yes if you configure it (meaning...

    Simple answer, yes if you configure it (meaning your code that is downloaded and running)
  8. Did you try Google? TriCore DSP Optimization...

    Did you try Google?

    TriCore DSP Optimization Guide - Part 1: Instruction Set
    https://www.infineon.com/dgdl/sj1001366.pdf?fileId=db3a304312bae05f0112be6e62be0102

    TriCore DSP Optimization Guide...
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    295

    You would need to provide more details on what...

    You would need to provide more details on what you mean by "Hard" or "Soft" reset.

    Concerning the DSPR RAM contents after any reset depends on what you have programmed in the FLASH0_PROCOND...
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    For the Tasking toolchain you could do something...

    For the Tasking toolchain you could do something like:

    Where you need to add a section to the lsl file:



    section_layout :vtc:linear
    {
    group pspr0 ( run_addr = mem:pspr0,...
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    The Program Scratch-Pad RAM (PSPR) is tightly...

    The Program Scratch-Pad RAM (PSPR) is tightly coupled RAM located in the PMI with its own memory space. To execute from PSPR you would do like any other microcontroller to exectue from RAM. Generally...
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    The Memory Test Unit (MTU) and the Safety Memory...

    The Memory Test Unit (MTU) and the Safety Memory Protection (SPROT) are two different things. Both are not enabled when user software executes out of reset.
  13. You could implement message passing or shared...

    You could implement message passing or shared memory using IPC methods or semaphores.
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    490

    Here is the code snippet that I used: void...

    Here is the code snippet that I used:

    void CopyStandbyRedundancyData(void){
    uint32_t *src = (uint32_t *)0xD0002000;
    volatile uint32_t data;


    /* Preparation before to enter Stand-by mode */
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    563

    For the TC2xx devices the fBAUD2 is derived from...

    For the TC2xx devices the fBAUD2 is derived from either the fPLL or fBACK and you can also divide it. It depends on the settings in the CCUCON0 register.
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    Yes, the application can program a UCB. However...

    Yes, the application can program a UCB. However for these UCB's this doesn't make sense to me. You would enable the protects in your end-of-line with a password writing the UCB's. Then in the field...
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    The Formula: 4100 This what you asked: ...

    The Formula:

    4100

    This what you asked:


    Now you ask
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    From the User’s Manual TLEAD = TBAUD2 *...

    From the User’s Manual
    TLEAD = TBAUD2 * BACON.LPRE * BACON.LEAD

    For the calculation of the delay:
    TBAUD2 = 1 / fBAUD2
    TLEAD = TBAUD2 * 4^LPRE * (LEAD+1)

    You provided the following parameters...
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    It seems the "access terms" table is not in the...

    It seems the "access terms" table is not in the TC22x user's manual. This table is defined in the other user's manuals like on the TC27x-D User's Manual. download this and search for "access terms"...
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    Assuming 200MHz (fBAUD2), I calculate 80 nsec not...

    Assuming 200MHz (fBAUD2), I calculate 80 nsec not 80 usec. You should also check the output driver strength for SPI0 pins are set to speed grade 1.
  21. It is complaining that it can't find "beginning"...

    It is complaining that it can't find "beginning" and "end" of the heap in your lsl file and you are assigning it in your source file somewhere.

    For example in user stack in cstart.c
    /* linker...
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    When you write to a register you need to check...

    When you write to a register you need to check its write access rights. The CLC register write access requires you to be in supervisor mode, access protection allowed for this master and you have...
  23. Yes, please see section "4.4. Multi-core Hardware...

    Yes, please see section "4.4. Multi-core Hardware Debugging" in the debugger manual
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    When you write to any special function register...

    When you write to any special function register (SFR) there are write attributes associated with them. For example do you need to be in supervisor or user mode and if it is a critical register it...
  25. You didn't say which AURIX device you are using? ...

    You didn't say which AURIX device you are using?

    You can check with Infineon but I believe this is a documentation oversight issue (meaning this bit doesn't exist for your device) as the...
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