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My purpose is to control the private server motor. Because most servo motors are controlled using pulses. So if it involves the acceleration and deceleration of the motor, the interval between each pulse may be different. Therefore, every time the timer is interrupted, the entry time of the next timer will be changed. In STM32, I can make the time into a list. Then directly import the register TIM3->ARR = tim[X]. However, it was found that in XMC1302, it is not allowed to write values directly to the register. But need to use

TIMER_Stop(&TIMER_0);
status = TIMER_SetTimeInterval(&TIMER_0, tim[ X ]);
if (status == TIMER_STATUS_SUCCESS)
{
        TIMER_Start(&TIMER_0);
}

This is how you can reset it. But this code runs too slowly. About 60US. This is obviously too long. Is there a faster way?

你好，我想问一下，串口如果使用DMA模式的话，有什么方法可以让我获得串口接收到的数据，除了函数getbuffer以及DMA通道回调事件触发的时候能够获得其handle的buffer。这两种方法虽然可以得到串口收到的数据，但是如果之前配置的缓存区没有满的话，我们是拿不到buffer，因此也拿不到他的数据。
此外，我也用了CyU3PDmaChannelSetWrapUp函数，能够在DMA通道缓存区未满时将其强制提交，从而获得缓存区。这个方法虽然好，但是我用一个线程任务专门执行这个函数，它竟然有次数限制，当超过了某一个次数的时候，它就不再使用，这是怎么回事呢？

Dear Infineon team,
the spice model of the IMZA120R014M1H and other models in the same .lib file are incompatible with SPICE.
In LTSPICE the program repots: "ERROR: Node U1:$M009F:$M01LF:N03D6 is floating and connected to current source G:U1:$M009F:$M01LF:01NW".
The VCCSs G01NW and G01O5 have specified 2 nodes and a value. A VCCS needs to be specified with 4 nodes, correct?
Is there a fix for this issue?

Hi Expertises,

In TLE9012 DQU chapter 17 mentioned that "Cell voltage supervision warning flags CELL_UV_DAC_COMP" and "Cell voltage supervision warning flags CELL_OV_DAC_COMP" can detect overvoltage and undervoltage. Is it the same as cell_UV and cell_OV?

Where could I find more details for CELL_UV_DAC_COMP and CELL_OV_DAC_COMP?  Would someone explain that how to operate and set?

Thanks

1.请问我在官网上看到了，伺服电机的方案。

2.请问这个方案是否开放？

3.如果开放能获得那些资料。

Whitepaper_CoolSiC™ – The_perfect_solution_for_servo_drives_EN (infineon.com)

hi

i want to use the SCR in order to reduce the power consumption , and meet some block point. please check state flow bellowing :

if SW switch to SCR domain to execute, which position will sw execute next after wake up source login and exit from SCR domain ?

Step A (step A as the SW first code after reset  )?  or back to Step B?

Hi,

      I use the XMC4500F144K1024 chip as the main chip, and connect the TJAG download port of the slave ESP32 chip to the SPI pin of that chip. Is it feasible to use software to simulate SPI as a JTAG function and burn the program into the ESP32 chip? Is there any reference code or case for similar requirements that can be used for reference?

Thanks.

XMC4500-E144F1024 AC 

Dear Infineon

I want to translate the following KBA, please confirm to my work.

Are the CAN FD transceivers capable of classical C... - Infineon Developer Community

Best Regards,

Ryu

Hi team, I wanted to confirm whether the below EVM board is compatible for CY8CPROTO-063-BLE kit. If not can you share the correct EVM board details. 

CY8CPROTO-063-BLE - Infineon Technologies

Thankyou