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Hello,

I'm running MTB 3.2 GUI in Ubuntu 22.04.4 LTS and building the Security_App PSoC6 example for the Prototyping Kit (CY8CPROTO-062-4343W).

After creating the default Security_App example, I added the emeeprom (v2.20.0) component, so as to read/write settings to the PSoC6 32kB Auxilliary Flash.  I copied the code from Emeeprom's README.md

https://infineon.github.io/emeeprom/em_eeprom_api_reference_manual/html/index.html#section_em_eeprom_quick_start

And added a line CY_SECTION(".cy_em_eeprom") , so that emEepromStorage will be kept in the 32kB Auxilliary Flash.

However, the code failed to compile:

/opt/Tools/ModusToolbox/tools_3.2/cymcuelftool-1.0/bin/cymcuelftool --merge ../proj_cm0p/build/APP_CY8CPROTO-062-4343W/Debug/proj_cm0p.elf ./build/BOOT/APP_CY8CPROTO-062-4343W/Debug/proj_cm4.elf --output ./build/BOOT/APP_CY8CPROTO-062-4343W/Debug/primary_app.elf --hex ./build/BOOT/APP_CY8CPROTO-062-4343W/Debug/primary_app.hex; cp -f ./build/BOOT/APP_CY8CPROTO-062-4343W/Debug/primary_app.hex ./build/BOOT/APP_CY8CPROTO-062-4343W/Debug/primary_app_BOOT_raw.hex; rm -f ./build/BOOT/APP_CY8CPROTO-062-4343W/Debug/primary_app.hex; /opt/Tools/ModusToolbox/tools_3.2/gcc/bin/arm-none-eabi-objcopy --change-addresses=0 -O ihex ./build/BOOT/APP_CY8CPROTO-062-4343W/Debug/primary_app.elf ./build/BOOT/APP_CY8CPROTO-062-4343W/Debug/primary_app_BOOT_unsigned.hex; ../../mtb_shared/core-make/release-v3.3.1/make/scripts/python3.bash ../../mtb_shared/mcuboot/v1.8.1-cypress/scripts/imgtool.py sign --header-size 0x400 --pad-header --align 8 -v 1.0.0 -S 917504 -M 1792 --overwrite-only -R 0 -k ../proj_btldr_cm0p/keys/cypress-test-ec-p256.pem ./build/BOOT/APP_CY8CPROTO-062-4343W/Debug/primary_app_BOOT_unsigned.hex ./build/BOOT/APP_CY8CPROTO-062-4343W/Debug/primary_app.hex; cp -f ./build/BOOT/APP_CY8CPROTO-062-4343W/Debug/primary_app.hex ./build/BOOT/APP_CY8CPROTO-062-4343W/Debug/primary_app_BOOT.hex;
No ELF section .cychecksum found, creating one
Application checksum calculated and stored in ELF section .cychecksum
No ELF section .cymeta found, creating one
Checksum calculated and stored in ELF section .cymeta
Usage: imgtool.py sign [OPTIONS] INFILE OUTFILE
Try 'imgtool.py sign -h' for help.

Error: Image size (0x3fe0896) + trailer (0x20) exceeds requested size 0xe0000

make[1]: Leaving directory '/home/ub2204/work/psoc/tansiowk_mtw_3_1/Security_App_Emeeprom/proj_cm4'
cp: cannot stat './build/BOOT/APP_CY8CPROTO-062-4343W/Debug/primary_app.hex': No such file or directory
make[2]: *** [../../mtb_shared/core-make/release-v3.3.1/make/core/bwc.mk:161: _mtb_build__legacy_project_postbuild] Error 1
make[1]: *** [../../mtb_shared/core-make/release-v3.3.1/make/core/main.mk:385: secondstage_build] Error 2
make: *** [/opt/Tools/ModusToolbox/tools_3.2/make/application.mk:72: build] Error 2
"/opt/Tools/ModusToolbox/tools_3.2/modus-shell/bin/make CY_MAKE_IDE=eclipse CY_IDE_TOOLS_DIR=/opt/Tools/ModusToolbox/tools_3.2 CY_IDE_BT_TOOLS_DIR= -j6 all" terminated with exit code 2. Build might be incomplete.

I have attached the code, build error log and map file.

Thanks for any advice!

BR,

SK

Hi, I tried to implement the mtb-littlefs in my xmc7100D board  with few modification to mq serial-read/write program: But I am encountering an error: could you tell me why I am unable to do "

"

My COM Port:

in my lfs.c:

lfs_ssize_t lfs_file_read(lfs_t *lfs, lfs_file_t *file,
        void *buffer, lfs_size_t size) {
    int err = LFS_LOCK(lfs->cfg);
    if (err) {
        return err;
    }
    LFS_TRACE("lfs_file_read(%p, %p, %p, %"PRIu32")",
            (void*)lfs, (void*)file, buffer, size);
    printf("lfs_file_read(%p, %p, %p, %"PRIu32")",
                (void*)lfs, (void*)file, buffer, size);
    LFS_ASSERT(lfs_mlist_isopen(lfs->mlist, (struct lfs_mlist*)file));

    lfs_ssize_t res = lfs_file_rawread(lfs, file, buffer, size);

    LFS_TRACE("lfs_file_read -> %"PRId32, res);
    LFS_UNLOCK(lfs->cfg);
    return res;
}

How do I solve the LS_ASSERT function from failing?

Also how do I verify little_fs is not mounted on the internal flash but on the inbuild external flash memory.

Best,

PrasadA

您好，我在使用xmc4800，ethercat。这个示例代码ETHCAT_SSC_AUT_BASE_XMC48里添加PMSM_FOC组件，报了两个错误，我在单独使用PMSM_FOC这个工程正常编译运行。但在ETHCAT_SSC_AUT_BASE_XMC48就会出现这两个问题，请看附件图

多次尝试无法解决，请帮看一下。感谢！！！

Hi 

I want to know  sleep current of TLE9853QX & also it auto wake when LIN signal is available. My customer is using in Flush door handle.

I have seen multiple sleep mode specs available in datasheet  but not able to understand actual avg sleep mode current required.

Regards

Lucky Kumar

TL9183Q MLCC Chip Capacitor for Charge Pump CB 4.7uF It is prone to whistling, and replacing it with a larger or smaller capacitor value does not improve it much.

Any good solutions?

Hello all,

     I am very tired to work with FOC using imc101t-f048, In this FOC method i cannot achieve 3000rpm in 2sec(This is already discussed in this thread  (https://community.infineon.com/t5/Motor-Control-ICs/FOC-vs-Trapesoidal/m-p/711550#M3771)) , so i decided to work in Trapezoidal commutation. Kindly clarify IMC101t-f048 microcontroller does support trapezoidal commutation. If support which software is used for trapezoidal like MCE wizard for FOC? 

Hello everyone, my board needs to use a SmartPIM1 series IGBT module: FP35R12U1T4, according to the SmartPIM1 assembly instructions AN2009_09, PCB boards have a layer of tin after the metalization of the aperture, I would like to ask this layer of tin is plated with the surface treatment using the sinking tin process? It seems that most PCB manufacturers nowadays are spraying tin, and there seems to be only copper on the inside of the holes, will this affect the assembly?

Another problem is that according to the assembly instructions the board needs to be drilled between 1.12mm ~ 1.15mm, I can find the best precision factory crimp hole hole diameter tolerance is also ± 0.05mm, it seems not quite able to meet the error requirements. I would like to ask you to play this kind of board to find what manufacturers to meet the requirements?

Does TC397 support Network 1588 time synchronization protocol? What are the solutions for TC397 time synchronization?

hi，大家好

目前在使用Psoc6 ble开发板开发，M0核和M4核都有使用，分别建立了工程，在各自的核擦写都是成功的。现在遇到的问题是用M0核做boot loader，跳转到M4核执行App后，擦写就会失败 。请帮忙看看，谢谢谢谢！